Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > On Tue, May 06, 2014 at 04:26:05PM +0300, Mika Kuoppala wrote: >> HW guys say that it is not a cool idea to let device >> go into rc6 without proper 3d pipeline state. > > * shrug > > What's improper 3d state and what prevents userspace from triggering > badness later? I would guess improver is 'whats is there after powerup'. But yes, we dont even know (yet?) what is the proper minimal state :P What comes to userspace triggering badness later is that the ring will hang and hangcheck will cleanup the mess. > The only problem I see in the patch is that you don't move the so->obj > to the GPU before execution - the code is only coherent thanks to LLC > atm. Fixed in v3. Thanks, -Mika > -Chris > > -- > Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
