Re: [PATCH 05/71] drm/i915/chv: Enable aliasing PPGTT for CHV

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> -----Original Message-----
> From: Intel-gfx [mailto:intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx] On Behalf
> Of ville.syrjala@xxxxxxxxxxxxxxx
> Sent: Wednesday, April 09, 2014 11:28 AM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Subject:  [PATCH 05/71] drm/i915/chv: Enable aliasing PPGTT for
> CHV
> 
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> 
> Enable aliasing PPGTT for CHV, but keep full PPGTT still disabled until it gets
> enabled for BDW.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>

Reviewed-by: Rafael Barbalho <rafael.barbalho@xxxxxxxxx>

> ---
>  drivers/gpu/drm/i915/i915_drv.h | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h index f760803..4abaa9e 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1831,9 +1831,10 @@ struct drm_i915_cmd_table {
>  #define I915_NEED_GFX_HWS(dev)	(INTEL_INFO(dev)->need_gfx_hws)
> 
>  #define HAS_HW_CONTEXTS(dev)	(INTEL_INFO(dev)->gen >= 6)
> -#define HAS_ALIASING_PPGTT(dev)	(INTEL_INFO(dev)->gen >= 6 &&
> !IS_VALLEYVIEW(dev))
> -#define HAS_PPGTT(dev)		(INTEL_INFO(dev)->gen >= 7 &&
> !IS_VALLEYVIEW(dev) \
> -				 && !IS_BROADWELL(dev))
> +#define HAS_ALIASING_PPGTT(dev)	(INTEL_INFO(dev)->gen >= 6 && \
> +				 (!IS_VALLEYVIEW(dev) ||
> IS_CHERRYVIEW(dev)))
> +#define HAS_PPGTT(dev)		(INTEL_INFO(dev)->gen >= 7 \
> +				 && !IS_GEN8(dev))
>  #define USES_PPGTT(dev)		intel_enable_ppgtt(dev, false)
>  #define USES_FULL_PPGTT(dev)	intel_enable_ppgtt(dev, true)
> 
> --
> 1.8.3.2
> 
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