On Wed, 30 Apr 2014, Dave Airlie <airlied@xxxxxxxxx> wrote: > On 30 April 2014 00:00, Paulo Zanoni <przanoni@xxxxxxxxx> wrote: >> From: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> >> >> Because the docs say ULX doesn't support it on HSW. > > i read the exact same thing, > > Reviewed-by: Dave Airlie <airlied@xxxxxxxxxx> Pushed to -fixes, thanks for the patch and review. BR, Jani. > >> >> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> >> --- >> drivers/gpu/drm/i915/i915_drv.h | 3 +++ >> drivers/gpu/drm/i915/intel_dp.c | 3 ++- >> include/drm/i915_pciids.h | 4 ++-- >> 3 files changed, 7 insertions(+), 3 deletions(-) >> >> >> This patch is completely untested!!! >> >> >> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h >> index e81feab..bdc612c 100644 >> --- a/drivers/gpu/drm/i915/i915_drv.h >> +++ b/drivers/gpu/drm/i915/i915_drv.h >> @@ -1816,6 +1816,9 @@ struct drm_i915_cmd_table { >> #define IS_ULT(dev) (IS_HSW_ULT(dev) || IS_BDW_ULT(dev)) >> #define IS_HSW_GT3(dev) (IS_HASWELL(dev) && \ >> ((dev)->pdev->device & 0x00F0) == 0x0020) >> +/* ULX machines are also considered ULT. */ >> +#define IS_HSW_ULX(dev) ((dev)->pdev->device == 0x0A0E || \ >> + (dev)->pdev->device == 0x0A1E) >> #define IS_PRELIMINARY_HW(intel_info) ((intel_info)->is_preliminary) >> >> /* >> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c >> index 34ed143..87b0a51 100644 >> --- a/drivers/gpu/drm/i915/intel_dp.c >> +++ b/drivers/gpu/drm/i915/intel_dp.c >> @@ -105,7 +105,8 @@ intel_dp_max_link_bw(struct intel_dp *intel_dp) >> case DP_LINK_BW_2_7: >> break; >> case DP_LINK_BW_5_4: /* 1.2 capable displays may advertise higher bw */ >> - if ((IS_HASWELL(dev) || INTEL_INFO(dev)->gen >= 8) && >> + if (((IS_HASWELL(dev) && !IS_HSW_ULX(dev)) || >> + INTEL_INFO(dev)->gen >= 8) && >> intel_dp->dpcd[DP_DPCD_REV] >= 0x12) >> max_link_bw = DP_LINK_BW_5_4; >> else >> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h >> index 24f3cad..5cd9165 100644 >> --- a/include/drm/i915_pciids.h >> +++ b/include/drm/i915_pciids.h >> @@ -191,8 +191,8 @@ >> INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \ >> INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \ >> INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \ >> - INTEL_VGA_DEVICE(0x0A0E, info), /* ULT GT1 reserved */ \ >> - INTEL_VGA_DEVICE(0x0A1E, info), /* ULT GT2 reserved */ \ >> + INTEL_VGA_DEVICE(0x0A0E, info), /* ULX GT1 mobile */ \ >> + INTEL_VGA_DEVICE(0x0A1E, info), /* ULX GT2 mobile */ \ >> INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \ >> INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */ \ >> INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \ >> -- >> 1.9.2 >> >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx >> http://lists.freedesktop.org/mailman/listinfo/intel-gfx > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx