[PATCH 08/13] drm/i915: Implement MI decode for gen8

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From: Ben Widawsky <benjamin.widawsky@xxxxxxxxxxxxxxx>

This is needed to implement ipehr_is_semaphore_wait

Signed-off-by: Ben Widawsky <ben@xxxxxxxxxxxx>
---
 drivers/gpu/drm/i915/i915_irq.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 2d76183..bfd21c7 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2561,12 +2561,9 @@ static bool
 ipehr_is_semaphore_wait(struct drm_device *dev, u32 ipehr)
 {
 	if (INTEL_INFO(dev)->gen >= 8) {
-		/*
-		 * FIXME: gen8 semaphore support - currently we don't emit
-		 * semaphores on bdw anyway, but this needs to be addressed when
-		 * we merge that code.
-		 */
-		return false;
+		/* Broadwell's semaphore wait is 3 dwords. We hope IPEHR is the
+		 * first dword. */
+		return (ipehr >> 23) == 0x1c;
 	} else {
 		ipehr &= ~MI_SEMAPHORE_SYNC_MASK;
 		return ipehr == (MI_SEMAPHORE_MBOX | MI_SEMAPHORE_COMPARE |
@@ -2586,6 +2583,8 @@ semaphore_wait_to_signaller_ring(struct intel_ring_buffer *ring, u32 ipehr)
 		 * FIXME: gen8 semaphore support - currently we don't emit
 		 * semaphores on bdw anyway, but this needs to be addressed when
 		 * we merge that code.
+		 *
+		 * XXX: Gen8 needs more than just IPEHR.
 		 */
 		return NULL;
 	} else {
-- 
1.9.2

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