On Fri, Apr 11, 2014 at 05:01:20PM +0530, Vandana Kannan wrote: > Adding relevant read out comparison code, in check_crtc_state, for the new > member of crtc_config, dp_m2_n2, which was introduced to store link_m_n > values for a DP downclock mode (if available). Suggested by Daniel. > > Signed-off-by: Vandana Kannan <vandana.kannan@xxxxxxxxx> > Cc: Daniel Vetter <daniel.vetter@xxxxxxxx> > --- > drivers/gpu/drm/i915/intel_display.c | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 1af1d14..36fc034 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -9199,6 +9199,15 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc, > pipe_config->dp_m_n.gmch_m, pipe_config->dp_m_n.gmch_n, > pipe_config->dp_m_n.link_m, pipe_config->dp_m_n.link_n, > pipe_config->dp_m_n.tu); > + > + DRM_DEBUG_KMS("dp: %i, gmch_m2: %u, gmch_n2: %u, link_m2: %u, link_n2: %u, tu2: %u\n", > + pipe_config->has_dp_encoder, > + pipe_config->dp_m2_n2.gmch_m, > + pipe_config->dp_m2_n2.gmch_n, > + pipe_config->dp_m2_n2.link_m, > + pipe_config->dp_m2_n2.link_n, > + pipe_config->dp_m2_n2.tu); > + > DRM_DEBUG_KMS("requested mode:\n"); > drm_mode_debug_printmodeline(&pipe_config->requested_mode); > DRM_DEBUG_KMS("adjusted mode:\n"); > @@ -9619,6 +9628,12 @@ intel_pipe_config_compare(struct drm_device *dev, > PIPE_CONF_CHECK_I(dp_m_n.link_n); > PIPE_CONF_CHECK_I(dp_m_n.tu); > > + PIPE_CONF_CHECK_I(dp_m2_n2.gmch_m); > + PIPE_CONF_CHECK_I(dp_m2_n2.gmch_n); > + PIPE_CONF_CHECK_I(dp_m2_n2.link_m); > + PIPE_CONF_CHECK_I(dp_m2_n2.link_n); > + PIPE_CONF_CHECK_I(dp_m2_n2.tu); > + > PIPE_CONF_CHECK_I(adjusted_mode.crtc_hdisplay); > PIPE_CONF_CHECK_I(adjusted_mode.crtc_htotal); > PIPE_CONF_CHECK_I(adjusted_mode.crtc_hblank_start); Either I'm missing something or your patch lacks state readout support for pipe_config->dp_m2_n2. It /should/ result in piles of WARNING backtraces when you run this. Or you've based this on an Android tree which has the state cross checker disabled. I'm confused. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx