[PATCH] drm/i915/bdw: Add 42ms delay for IPS disable

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From: Ben Widawsky <benjamin.widawsky@xxxxxxxxxxxxxxx>

This is a requirement added to the spec. This patch will present
persistent corruption on the display.

Cc: Art Runyan <arthur.j.runyan@xxxxxxxxx>
Signed-off-by: Ben Widawsky <ben@xxxxxxxxxxxx>
---
 drivers/gpu/drm/i915/intel_display.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 7f02444..ebc84ee 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3583,7 +3583,7 @@ void hsw_disable_ips(struct intel_crtc *crtc)
 		return;
 
 	assert_plane_enabled(dev_priv, crtc->plane);
-	if (IS_BROADWELL(crtc->base.dev)) {
+	if (IS_BROADWELL(dev)) {
 		mutex_lock(&dev_priv->rps.hw_lock);
 		WARN_ON(sandybridge_pcode_write(dev_priv, DISPLAY_IPS_CONTROL, 0));
 		mutex_unlock(&dev_priv->rps.hw_lock);
@@ -3594,6 +3594,10 @@ void hsw_disable_ips(struct intel_crtc *crtc)
 
 	/* We need to wait for a vblank before we can disable the plane. */
 	intel_wait_for_vblank(dev, crtc->pipe);
+
+	/* wait for pcode to finish disabling IPS, which may take up to 42ms */
+	if (IS_BROADWELL(dev))
+		msleep(42);
 }
 
 /** Loads the palette/gamma unit for the CRTC with the prepared values */
-- 
1.9.1

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