On Wed, Apr 09, 2014 at 01:28:42PM +0300, ville.syrjala@xxxxxxxxxxxxxxx wrote:
> From: Deepak S <deepak.s@xxxxxxxxx>
>
> This was fumbled in chv specific forcewake count during mmio reg read/write.
>
> Issue introduced in
>
> commit 95cf8b69f647322048929baffa8c7865aa6df2ad
> Author: Deepak S <deepak.s@xxxxxxxxx>
> Date: Mon Dec 16 12:16:54 2013 +0530
> Subject: drm/i915/chv: Added CHV specific register read and write
Again please squash in as a fixup.
-Daniel
>
> Signed-off-by: Deepak S <deepak.s@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_uncore.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 8e3c686..ccad770 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -638,12 +638,12 @@ chv_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
> } \
> val = __raw_i915_read##x(dev_priv, reg); \
> if (FORCEWAKE_RENDER & fwengine) { \
> - if (dev_priv->uncore.fw_rendercount++ == 0) \
> + if (--dev_priv->uncore.fw_rendercount == 0) \
> (dev_priv)->uncore.funcs.force_wake_put(dev_priv, \
> fwengine); \
> } \
> if (FORCEWAKE_MEDIA & fwengine) { \
> - if (dev_priv->uncore.fw_mediacount++ == 0) \
> + if (--dev_priv->uncore.fw_mediacount == 0) \
> (dev_priv)->uncore.funcs.force_wake_put(dev_priv, \
> fwengine); \
> } \
> @@ -803,12 +803,12 @@ chv_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace)
> } \
> __raw_i915_write##x(dev_priv, reg, val); \
> if (__needs_put && (FORCEWAKE_RENDER & fwengine)) { \
> - if (dev_priv->uncore.fw_rendercount++ == 0) \
> + if (--dev_priv->uncore.fw_rendercount == 0) \
> (dev_priv)->uncore.funcs.force_wake_put(dev_priv, \
> fwengine); \
> } \
> if (__needs_put && (FORCEWAKE_MEDIA & fwengine)) { \
> - if (dev_priv->uncore.fw_mediacount++ == 0) \
> + if (--dev_priv->uncore.fw_mediacount == 0) \
> (dev_priv)->uncore.funcs.force_wake_put(dev_priv, \
> fwengine); \
> } \
> --
> 1.8.3.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
