On Sun, Apr 06, 2014 at 12:58:56PM -0700, Ben Widawsky wrote:
> Screwed up the CC... my bad. Basically, I started doing my own state
> setup thing, and thought Mika could benefit. In the end my thing didn't
> solve the problem I was trying to solve.
Okay, I botched the patch too. See below, if you use it.
>
> On Sun, Apr 06, 2014 at 12:54:10PM -0700, Ben Widawsky wrote:
> > Mika Kuoppala <miku@xxxxxx>
> > Signed-off-by: Ben Widawsky <ben@xxxxxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/i915_drv.h | 2 ++
> > drivers/gpu/drm/i915/i915_gem_context.c | 3 +++
> > drivers/gpu/drm/i915/intel_uncore.c | 8 ++++++++
> > 3 files changed, 13 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 952fdba..9f6a8c1 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -501,6 +501,8 @@ struct intel_uncore_funcs {
> > uint32_t val, bool trace);
> > void (*mmio_writeq)(struct drm_i915_private *dev_priv, off_t offset,
> > uint64_t val, bool trace);
> > +
> > + int (*hw_state_setup)(struct drm_device *dev);
> > };
> >
> > struct intel_uncore {
> > diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> > index fdf1736..513beea 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_context.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> > @@ -491,6 +491,9 @@ int i915_gem_context_enable(struct drm_i915_private *dev_priv)
> > struct intel_ring_buffer *ring;
> > int ret, i;
> >
> > + if (dev_priv->uncore.funcs.hw_state_setup(dev_priv->dev))
> > + dev_priv->uncore.funcs.hw_state_setup(dev_priv->dev);
> > +
+ if (dev_priv->uncore.funcs.hw_state_setup)
> > if (!HAS_HW_CONTEXTS(dev_priv->dev))
> > return 0;
> >
> > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> > index e206c41..9241901 100644
> > --- a/drivers/gpu/drm/i915/intel_uncore.c
> > +++ b/drivers/gpu/drm/i915/intel_uncore.c
> > @@ -40,6 +40,8 @@
> >
> > #define __raw_posting_read(dev_priv__, reg__) (void)__raw_i915_read32(dev_priv__, reg__)
> >
> > +static int gen8_hw_state_setup(struct drm_device *dev);
> > +
> > static void
> > assert_device_not_suspended(struct drm_i915_private *dev_priv)
> > {
> > @@ -800,6 +802,7 @@ void intel_uncore_init(struct drm_device *dev)
> > dev_priv->uncore.funcs.mmio_writel = gen8_write32;
> > dev_priv->uncore.funcs.mmio_writeq = gen8_write64;
> >
> > + dev_priv->uncore.funcs.hw_state_setup = gen8_hw_state_setup;
> > break;
> > case 7:
> > if (IS_HASWELL(dev)) {
> > @@ -1068,3 +1071,8 @@ void intel_uncore_check_errors(struct drm_device *dev)
> > __raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
> > }
> > }
> > +
> > +static int gen8_hw_state_setup(struct drm_device *dev)
> > +{
> > + return 0;
> > +}
> > --
> > 1.9.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Ben Widawsky, Intel Open Source Technology Center
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ben Widawsky, Intel Open Source Technology Center
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