On Sat, 05 Apr 2014, Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> wrote: > This only applies to external sinks. [citation needed] eDP 1.3 has SET_POWER_CAPABLE (bit 7) in in DPCD EDP_GENERAL_CAPABILITY_REGISTER_1 (register 0x702) which indicates whether panel power state can be controlled through DP_SET_POWER. Even when the panel is not capable, writing to DP_SET_POWER should have no effect on the panel. BR, Jani. > > Signed-off-by: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_dp.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 7642415..df7cc11 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -1783,7 +1783,8 @@ static void intel_disable_dp(struct intel_encoder *encoder) > * ensure that we have vdd while we switch off the panel. */ > intel_edp_panel_vdd_on(intel_dp); > intel_edp_backlight_off(intel_dp); > - intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); > + if (!is_edp(intel_dp)) > + intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); > intel_edp_panel_off(intel_dp); > > /* cpu edp my only be disable _after_ the cpu pipe/plane is disabled. */ > @@ -1821,7 +1822,8 @@ static void intel_enable_dp(struct intel_encoder *encoder) > return; > > intel_edp_panel_vdd_on(intel_dp); > - intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); > + if (!is_edp(intel_dp)) > + intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); > intel_dp_start_link_train(intel_dp); > intel_edp_panel_on(intel_dp); > edp_panel_vdd_off(intel_dp, true); > -- > 1.8.4.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
