On Thu, Apr 03, 2014 at 05:16:16PM +0200, Daniel Vetter wrote: > btw the 1k thing at least on i865G is iirc just the writeout fifo between > the cpu and the gmch to paper over FSB latencies (or whatever irked hw > designers). Isn't there a 1024 byte supercacheline for msaa as well? At least that sticks out in my mind from the discussions on when not to use eDRAM etc. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
