On Thu, Apr 03, 2014 at 08:05:35AM +0100, Chris Wilson wrote: > On Wed, Apr 02, 2014 at 10:30:23PM -0700, Ben Widawsky wrote: > > We have been setting the bit which was originally BIOS dependent since: > > commit f05bb0c7b624252a5e768287e340e8e45df96e42 > > Author: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > Date: Sun Jan 20 16:33:32 2013 +0000 > > > > drm/i915: GFX_MODE Flush TLB Invalidate Mode must be '1' for scanline waits > > > > Therefore, we do not need to try to figure it out dynamically and we can > > just always invalidate the TLBs. > > > > It's a partial revert of: > > commit 12b0286f49947a6cdc9285032d918466a8c3f5f9 > > Author: Ben Widawsky <ben@xxxxxxxxxxxx> > > Date: Mon Jun 4 14:42:50 2012 -0700 > > > > drm/i915: possibly invalidate TLB before context switch > > > > The original commit attempted to only invalidate when necessary > > (very much a relic from the old days). Now, we can just always invalidate. > > > > I guess the old TODO still exists. Since we seem to have abandoned ILK > > contexts however, there isn't much point in even remembering. > > > > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > Signed-off-by: Ben Widawsky <ben@xxxxxxxxxxxx> > > Seems reasonable, except in most cases (execbuffer) there will be > a following cache-invalidate as part of the move-to-gpu. Except we still move_to_gpu() before the context switch. My fbc related patch to change that order never got merged. > > Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > ILK ctx, never forget. > -Chris > > -- > Chris Wilson, Intel Open Source Technology Centre > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
