On Mon, 31 Mar 2014 18:21:29 +0300
ville.syrjala@xxxxxxxxxxxxxxx wrote:
> From: Rafael Barbalho <rafael.barbalho@xxxxxxxxx>
>
> The framecount register was still using the old PIPE macro instead
> of the new PIPE2 macro
>
> Signed-off-by: Rafael Barbalho <rafael.barbalho@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index a47b4c3..b6441da 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3623,9 +3623,9 @@ enum punit_power_well {
> #define PIPE_PIXEL_MASK 0x00ffffff
> #define PIPE_PIXEL_SHIFT 0
> /* GM45+ just has to be different */
> -#define _PIPEA_FRMCOUNT_GM45 (dev_priv->info.display_mmio_offset + 0x70040)
> -#define _PIPEA_FLIPCOUNT_GM45 (dev_priv->info.display_mmio_offset + 0x70044)
> -#define PIPE_FRMCOUNT_GM45(pipe) _PIPE(pipe, _PIPEA_FRMCOUNT_GM45, _PIPEB_FRMCOUNT_GM45)
> +#define _PIPEA_FRMCOUNT_GM45 0x70040
> +#define _PIPEA_FLIPCOUNT_GM45 0x70044
> +#define PIPE_FRMCOUNT_GM45(pipe) _PIPE2(pipe, _PIPEA_FRMCOUNT_GM45)
>
> /* Cursor A & B regs */
> #define _CURACNTR (dev_priv->info.display_mmio_offset + 0x70080)
Oh fun.
Reviewed-by: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx>
--
Jesse Barnes, Intel Open Source Technology Center
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