On Mon, 31 Mar 2014 18:21:25 +0300 ville.syrjala@xxxxxxxxxxxxxxx wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > There's no point in hiding the DP M/N setup in the update_pll functions. > Just move it to the mode_set function. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_display.c | 9 +++------ > 1 file changed, 3 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index ecc01f5..add940c 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -5245,9 +5245,6 @@ static void vlv_update_pll(struct intel_crtc *crtc) > << DPLL_MD_UDI_MULTIPLIER_SHIFT; > crtc->config.dpll_hw_state.dpll_md = dpll_md; > > - if (crtc->config.has_dp_encoder) > - intel_dp_set_m_n(crtc); > - > mutex_unlock(&dev_priv->dpio_lock); > } > > @@ -5325,9 +5322,6 @@ static void i9xx_update_pll(struct intel_crtc *crtc, > << DPLL_MD_UDI_MULTIPLIER_SHIFT; > crtc->config.dpll_hw_state.dpll_md = dpll_md; > } > - > - if (crtc->config.has_dp_encoder) > - intel_dp_set_m_n(crtc); > } > > static void i8xx_update_pll(struct intel_crtc *crtc, > @@ -5656,6 +5650,9 @@ skip_dpll: > dspcntr |= DISPPLANE_SEL_PIPE_B; > } > > + if (intel_crtc->config.has_dp_encoder) > + intel_dp_set_m_n(intel_crtc); > + > intel_set_pipe_timings(intel_crtc); > > /* pipesrc and dspsize control the size that is scaled from, Yeah I like it. Reviewed-by: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> -- Jesse Barnes, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
