On Tue, Apr 01, 2014 at 06:51:39PM +0300, Imre Deak wrote: > On Fri, 2014-03-07 at 20:12 -0300, Paulo Zanoni wrote: > > From: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > > > > This sould be enough. > > > > v2: BDW should also run hsw_runtime_resume (Ben). > > > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > > Looks good, > Reviewed-by: Imre Deak <imre.deak@xxxxxxxxx> Pulled in entire series. I'm not really happy about the split in what we restore between snb and hsw/bdw and the next guy who adds a platform hook here gets to refactor it all. It /should/ all be driven by common code like the generic resume/driver load code. If we have subtile differences here it'll be a lot of fun with random oopses. -Daniel > > > --- > > drivers/gpu/drm/i915/i915_drv.c | 8 ++++++-- > > drivers/gpu/drm/i915/i915_drv.h | 3 ++- > > 2 files changed, 8 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > > index 55f0181..2dcbbc0 100644 > > --- a/drivers/gpu/drm/i915/i915_drv.c > > +++ b/drivers/gpu/drm/i915/i915_drv.c > > @@ -874,8 +874,10 @@ static int intel_runtime_suspend(struct device *device) > > > > if (IS_GEN6(dev)) > > snb_runtime_suspend(dev_priv); > > - else if (IS_HASWELL(dev)) > > + else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) > > hsw_runtime_suspend(dev_priv); > > + else > > + WARN_ON(1); > > > > i915_gem_release_all_mmaps(dev_priv); > > > > @@ -910,8 +912,10 @@ static int intel_runtime_resume(struct device *device) > > > > if (IS_GEN6(dev)) > > snb_runtime_resume(dev_priv); > > - else if (IS_HASWELL(dev)) > > + else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) > > hsw_runtime_resume(dev_priv); > > + else > > + WARN_ON(1); > > > > DRM_DEBUG_KMS("Device resumed\n"); > > return 0; > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > > index 1debc412..2f7246a 100644 > > --- a/drivers/gpu/drm/i915/i915_drv.h > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > @@ -1997,7 +1997,8 @@ struct drm_i915_cmd_table { > > #define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi) > > #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg) > > #define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev)) > > -#define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev)) > > +#define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev) || \ > > + IS_BROADWELL(dev)) > > > > #define INTEL_PCH_DEVICE_ID_MASK 0xff00 > > #define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx