You are right on the money: it looks like I am missing the "Force Posted" bit. I´ll add in the next patch series version. Thanks, Oscar > -----Original Message----- > From: Lespiau, Damien > Sent: Tuesday, April 01, 2014 1:01 AM > To: Mateo Lozano, Oscar > Cc: intel-gfx@xxxxxxxxxxxxxxxxxxxxx; Ben Widawsky; Widawsky, Benjamin > Subject: Re: [PATCH 19/49] drm/i915/bdw: Populate LR contexts > (somewhat) > > On Thu, Mar 27, 2014 at 05:59:48PM +0000, oscar.mateo@xxxxxxxxx wrote: > > + if (ring->id == RCS) > > + reg_state[CTX_LRI_HEADER_0] = > MI_LOAD_REGISTER_IMM(14); > > + else > > + reg_state[CTX_LRI_HEADER_0] = > MI_LOAD_REGISTER_IMM(11); > > In the "Register State Context", this header is actually given in hex, but has bit > 12 set, shouldn't we do the same here? > > -- > Damien _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
