On Tue, Apr 01, 2014 at 10:54:36AM +0300, ville.syrjala@xxxxxxxxxxxxxxx wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Pull all the gmch platform hotplug interrupt handling into one
> function.
>
> v2: Move the IIR check to the caller
> s/drm_i915_private_t/struct drm_i915_private/
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
With the addition of the comment before the posting-read,
Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_irq.c | 69 ++++++++++++++++++-----------------------
> 1 file changed, 30 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 0858189..361e9b3 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1647,6 +1647,29 @@ static void valleyview_pipestat_irq_handler(struct drm_device *dev, u32 iir)
> gmbus_irq_handler(dev);
> }
>
> +static void i9xx_hpd_irq_handler(struct drm_device *dev)
> +{
> + struct drm_i915_private *dev_priv = dev->dev_private;
> + u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT);
> +
> + if (IS_G4X(dev)) {
> + u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_G4X;
> +
> + intel_hpd_irq_handler(dev, hotplug_trigger, hpd_status_g4x);
> + } else {
> + u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_I915;
> +
> + intel_hpd_irq_handler(dev, hotplug_trigger, hpd_status_i915);
> + }
> +
> + if ((IS_G4X(dev) || IS_VALLEYVIEW(dev)) &&
> + hotplug_status & DP_AUX_CHANNEL_MASK_INT_STATUS_G4X)
> + dp_aux_irq_handler(dev);
> +
> + I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);
/* Make sure hotplug status is cleared before we clear IIR,
* or else we may miss hotplug events.
*/
> + POSTING_READ(PORT_HOTPLUG_STAT);
> +}
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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