On Mon, Mar 31, 2014 at 04:49:28PM +0100, Chris Wilson wrote:
> On Mon, Mar 31, 2014 at 06:21:24PM +0300, ville.syrjala@xxxxxxxxxxxxxxx wrote:
> > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> >
> > Pull all the gmch platform hotplug interrupt handling into one
> > function.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/i915_irq.c | 71 +++++++++++++++++++----------------------
> > 1 file changed, 32 insertions(+), 39 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> > index 0858189..6d26719 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -1647,6 +1647,34 @@ static void valleyview_pipestat_irq_handler(struct drm_device *dev, u32 iir)
> > gmbus_irq_handler(dev);
> > }
> >
> > +static void i9xx_hpd_irq_handler(struct drm_device *dev, u32 iir)
> > +{
> > + drm_i915_private_t *dev_priv = dev->dev_private;
> > + u32 hotplug_status;
> > +
> > + if ((iir & I915_DISPLAY_PORT_INTERRUPT) == 0)
> > + return;
> > +
> > + hotplug_status = I915_READ(PORT_HOTPLUG_STAT);
> > +
> > + if (IS_G4X(dev)) {
> > + u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_G4X;
> > +
> > + intel_hpd_irq_handler(dev, hotplug_trigger, hpd_status_g4x);
> > + } else {
> > + u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_I915;
> > +
> > + intel_hpd_irq_handler(dev, hotplug_trigger, hpd_status_i915);
> > + }
> > +
> > + if ((IS_G4X(dev) || IS_VALLEYVIEW(dev)) &&
> > + hotplug_status & DP_AUX_CHANNEL_MASK_INT_STATUS_G4X)
> > + dp_aux_irq_handler(dev);
> > +
> > + I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);
> > + POSTING_READ(PORT_HOTPLUG_STAT);
> > +}
>
> Hmm, after some thought I am in favour of the function as a readibility
> improvement. However, I would prefer to have the iir check inlined
> into the caller.
I had it like that originally, but I moved it into the function when I
realized all the callers have the exact same check, and it looked a bit
out of place next to the other "sub" irq handlers which do the IIR
checks themselves.
But I'm not really attached to the idea, so I can change it back if
that's the consensus.
--
Ville Syrjälä
Intel OTC
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