On Wed, Mar 19, 2014 at 06:31:14PM -0700, Ben Widawsky wrote: > Programming it outside of the rp0-rp1 range is considered a programming > error. Since we do not know that the previous value would actually be in > the range, program something we've read from the hardware, and therefore > know will work. > > This is potentially an issue for platforms whose ranges are outside the > norms given in the programming guide (ie. early silicon) > > v2: Use RP1 instead of RPn > > Signed-off-by: Ben Widawsky <ben@xxxxxxxxxxxx> Do you have a reference for GEN6_RC_VIDEO_FREQ? I still have no idea what that controls, nor its valid range. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
