On Fri, Mar 07, 2014 at 08:05:24PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > > Otherwise, when we run intel_modeset_check_state we may already be > runtime suspended, and our state checking code will read registers > while the device is suspended. This can only happen if your > autosuspend_delay_ms is low (not the default 10s) and i915.pc8_timeout > is set to zero. > > NOTE: The correct way to fix this problem would be to properly get/put > runtime PM at the get_config/state functions. I still didn't do this, > so I'll keep this patch on the series because it fixes the remaining > WARNs we get while running the pm_pc8 test suite. It's fine if we > don't merge this. The problem Imre has added a bunch more power well enabling checks ... do we still have gaps in our coverage? If it's not a terrible lot of them I'd prefer we properly close those instead of this little hack here. So still not too happy to merge this ;-) -Daniel > > v2: - Add the note above. > > Reviewed-by: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_display.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 0868afb..dc2b377 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -9785,13 +9785,18 @@ static int intel_set_mode(struct drm_crtc *crtc, > struct drm_display_mode *mode, > int x, int y, struct drm_framebuffer *fb) > { > + struct drm_device *dev = crtc->dev; > + struct drm_i915_private *dev_priv = dev->dev_private; > int ret; > > + intel_runtime_pm_get(dev_priv); > + > ret = __intel_set_mode(crtc, mode, x, y, fb); > > if (ret == 0) > intel_modeset_check_state(crtc->dev); > > + intel_runtime_pm_put(dev_priv); > return ret; > } > > -- > 1.8.5.3 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx