From: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> Hi This is basically a rebase of "[PATCH 00/19] ILK+ interrupt improvements", which was sent to the mailing list on January 22. There are no real differences, except for the last patch, which is new. Original cover letter: http://lists.freedesktop.org/archives/intel-gfx/2014-January/038679.html The idea behind this series is that at some point our runtime PM code will just call our irq_preinstall, irq_postinstall and irq_uninstall functions instead of using dev_priv->pc8.regsave, so I decided to audit, cleanup and add a few WARNs to our code before we do that change. We gotta be in shape if we want to be exposed to runtime! Thanks, Paulo Paulo Zanoni (20): drm/i915: add GEN5_IRQ_INIT macro drm/i915: also use GEN5_IRQ_INIT with south display interrupts drm/i915: use GEN8_IRQ_INIT on GEN5 drm/i915: add GEN5_IRQ_FINI drm/i915: don't forget to uninstall the PM IRQs drm/i915: properly clear IIR at irq_uninstall on Gen5+ drm/i915: add GEN5_IRQ_INIT drm/i915: check if IIR is still zero at postinstall on Gen5+ drm/i915: fix SERR_INT init/reset code drm/i915: fix GEN7_ERR_INT init/reset code drm/i915: fix open coded gen5_gt_irq_preinstall drm/i915: extract ibx_irq_uninstall drm/i915: call ibx_irq_uninstall from gen8_irq_uninstall drm/i915: enable SDEIER later drm/i915: remove ibx_irq_uninstall drm/i915: add missing intel_hpd_irq_uninstall drm/i915: add ironlake_irq_reset drm/i915: add gen8_irq_reset drm/i915: only enable HWSTAM interrupts on postinstall on ILK+ drm/i915: add POSTING_READs to the IRQ init/reset macros drivers/gpu/drm/i915/i915_irq.c | 270 ++++++++++++++++++---------------------- 1 file changed, 121 insertions(+), 149 deletions(-) -- 1.8.5.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
