From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> This is the last part of my watermark saga. The main thing is the introduction of the two part watermark update mechanism. The original idea I had was to do the watermark programming from the vblank interrupt handler, but that didn't pan out. So instead we need to split the watermark update into a pre and post stages. In the pre stage we swithc over to intermediate watermarks that can handle both the old and new plane configuration. That allows the start of vblank where the double buffered registers are latched to happen any time after we've switched over to the intermediate watermarks. And after we're sure that planes are using the new configuration, we can switch over to the optimal watermarks instead or running with the potentially sub-standard intermediate watermarks. All the watermark programming is now done from the system workqueue and the interrupt handler just schedules the work when the target vblank count has been reached. The split between the patches is rather clumsy in parts. I couldn't come up with any sane way to keep the patches small and split the feature up in a sane way. So some of the patchs just add stuff w/o using it, and then one or two patches later it all comes together. I think it should be bisectable, but I may have missed something. At least it compiles all the way through. The series depends on my earlier drm vblank interrupt series [1], and I've had it sitting on top of my atomic sprite series [2], so those two should get merged before this one. [1] http://lists.freedesktop.org/archives/intel-gfx/2014-March/041207.html [2] http://lists.freedesktop.org/archives/intel-gfx/2014-February/040118.html Ville Syrjälä (24): drm/i915: Don't read sprite LP2+ registers on ILK/SNB drm/i915: Add some more tracked state to intel_pipe_wm drm/i915: Skip watermark merging for inactive pipes drm/i916: Refactor WM register maximums drm/i915: Merge LP1+ watermarks in safer way drm/i915: Disable/enable planes as the first/last thing during modeset on ILK+ drm/i915: Remove useless checks from primary enable/disable drm/i915: Shuffle wait_for_vblank out of primary_enable/disable funcs drm/i915: Keep vblank interrupts enabled while enabling/disabling planes drm/i915: Leave interrupts enabled while disabling crtcs during suspend drm/i915: Check hw vs. sw watermark state after programming drm/i915: Refactor ilk_validate_pipe_wm() drm/i915: Refactor ilk_update_wm drm/i915: Add dev_priv->wm.mutex drm/i915: Add vblank based delayed watermark update mechanism drm/i915: Split watermark programming into pre and post steps drm/i915: Actually perform the watermark update in two phases drm/i915: Wait for watermark updates to finish before disabling a pipe drm/i915: Refactor get_other_active_crtc() drm/i915: Disable LP1+ watermarks while changing the number of active pipes drm/i915: Keep track of who disabled LP1+ watermarks drm/i915: Prefer the 5/6 DDB split when primary is disabled drm/i915: Add a workaround for sprite only <-> primary only switching drm/i915: Don't disable LP1+ watermarks for every frame when scaled drivers/gpu/drm/i915/i915_drv.c | 3 +- drivers/gpu/drm/i915/i915_drv.h | 38 +- drivers/gpu/drm/i915/i915_irq.c | 12 +- drivers/gpu/drm/i915/intel_display.c | 267 ++++++---- drivers/gpu/drm/i915/intel_drv.h | 85 +++- drivers/gpu/drm/i915/intel_pm.c | 924 +++++++++++++++++++++++++++++------ drivers/gpu/drm/i915/intel_sprite.c | 118 +++-- 7 files changed, 1155 insertions(+), 292 deletions(-) -- 1.8.3.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
