On Fri, Feb 14, 2014 at 02:40:39PM +0200, Ville Syrjälä wrote: > On Fri, Feb 14, 2014 at 12:28:29PM +0000, Chris Wilson wrote: > > On Fri, Feb 14, 2014 at 02:18:57PM +0200, ville.syrjala@xxxxxxxxxxxxxxx wrote: > > > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > > > > Make sure the line_time_us isn't zero in the gmch watermarks code as > > > that would cause a div by zero. This can be triggered by specifying > > > a very fast pixel clock for the mode. > > > > Very fast but valid? > > 74.25 GHz. I'm not sure which way you would classify that :) I've added this to the commit message ... > > If it was just very fast, we should have rejected > > the mode line. > > Except we do more or less zero checks on the mode supplied to the > setcrtc ioctl. Something we should really get fixed at some point. Queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
