On Wed, Mar 05, 2014 at 02:46:35AM -0800, Daniel Vetter wrote: > On Tue, Feb 18, 2014 at 10:15:44AM -0800, bradley.d.volkin@xxxxxxxxx wrote: > > From: Brad Volkin <bradley.d.volkin@xxxxxxxxx> > > 3) Coherency. I've previously found a coherency issue on VLV when reading the > > batch buffer from the CPU during execbuffer2. Userspace writes the batch via > > pwrite fast path before calling execbuffer2. The parser reads stale data. > > This works fine on IVB and HSW, so I believe it's an LLC vs. non-LLC issue. > > It's possible that the shmem pread refactoring fixes this, I just have not > > been able to retest due to lack of a VLV system. > > Is it still true that we need to test this on vlv? The shmem_pread path > really should have fixed this ... Otherwise I think this looks ready to go > in, I'll pester Jani for the review. Yes, I still don't have a system to test on. Brad > > Thanks, Daniel > > > > > v2: > > - Significantly reorder series > > - Scan secure batches (i.e. I915_EXEC_SECURE) > > - Check that parser tables are sorted during init > > - Fixed gem_cpu_reloc regression > > - HAS_CMD_PARSER -> CMD_PARSER_VERSION getparam > > - Additional tests > > > > v3: > > - Don't actually send batches as secure yet > > - Improved documentation and commenting > > - Many other small cleanups throughout > > > > Brad Volkin (13): > > drm/i915: Refactor shmem pread setup > > drm/i915: Implement command buffer parsing logic > > drm/i915: Initial command parser table definitions > > drm/i915: Reject privileged commands > > drm/i915: Allow some privileged commands from master > > drm/i915: Add register whitelists for mesa > > drm/i915: Add register whitelist for DRM master > > drm/i915: Enable register whitelist checks > > drm/i915: Reject commands that explicitly generate interrupts > > drm/i915: Enable PPGTT command parser checks > > drm/i915: Reject commands that would store to global HWS page > > drm/i915: Add a CMD_PARSER_VERSION getparam > > drm/i915: Enable command parsing by default > > > > drivers/gpu/drm/i915/Makefile | 1 + > > drivers/gpu/drm/i915/i915_cmd_parser.c | 918 +++++++++++++++++++++++++++++ > > drivers/gpu/drm/i915/i915_dma.c | 3 + > > drivers/gpu/drm/i915/i915_drv.h | 103 ++++ > > drivers/gpu/drm/i915/i915_gem.c | 51 +- > > drivers/gpu/drm/i915/i915_gem_execbuffer.c | 18 + > > drivers/gpu/drm/i915/i915_params.c | 5 + > > drivers/gpu/drm/i915/i915_reg.h | 96 +++ > > drivers/gpu/drm/i915/intel_ringbuffer.c | 2 + > > drivers/gpu/drm/i915/intel_ringbuffer.h | 32 + > > include/uapi/drm/i915_drm.h | 1 + > > 11 files changed, 1216 insertions(+), 14 deletions(-) > > create mode 100644 drivers/gpu/drm/i915/i915_cmd_parser.c > > > > -- > > 1.8.3.2 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Daniel Vetter > Software Engineer, Intel Corporation > +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
