On Wed, Feb 19, 2014 at 10:19:18PM -0800, Ben Widawsky wrote: > Gen8 has already had some differentiation with how it handles rings. > Semaphores bring yet more differences, and now is as good a time as any > to do the split. > > Also, since gen8 doesn't actually use semaphores up until this point, > put the proper "NULL" values in for the mbox info. > > v2: v1 had a stale commit message > > v3: Move everything in the is_semaphore_enabled() check > > Signed-off-by: Ben Widawsky <ben@xxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_ringbuffer.c | 142 ++++++++++++++++++++++---------- > 1 file changed, 97 insertions(+), 45 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > index bf061dd..691da67 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > @@ -1870,19 +1870,34 @@ int intel_init_render_ring_buffer(struct drm_device *dev) > ring->id = RCS; > ring->mmio_base = RENDER_RING_BASE; > > - if (INTEL_INFO(dev)->gen >= 6) { > + if (INTEL_INFO(dev)->gen >= 8) { > + ring->add_request = gen6_add_request; > + ring->flush = gen8_render_ring_flush; > + ring->irq_get = gen8_ring_get_irq; > + ring->irq_put = gen8_ring_put_irq; > + ring->irq_enable_mask = GT_RENDER_USER_INTERRUPT; > + ring->get_seqno = gen6_ring_get_seqno; > + ring->set_seqno = ring_set_seqno; > + if (i915_semaphore_is_enabled(dev)) { > + ring->semaphore.sync_to = gen6_ring_sync; > + ring->semaphore.signal = gen6_signal; > + ring->semaphore.signal = gen6_signal; Double assignment. > + ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_INVALID; > + ring->semaphore.mbox.wait[VCS] = MI_SEMAPHORE_SYNC_INVALID; > + ring->semaphore.mbox.wait[BCS] = MI_SEMAPHORE_SYNC_INVALID; > + ring->semaphore.mbox.wait[VECS] = MI_SEMAPHORE_SYNC_INVALID; > + ring->semaphore.mbox.signal[RCS] = GEN6_NOSYNC; > + ring->semaphore.mbox.signal[VCS] = GEN6_NOSYNC; > + ring->semaphore.mbox.signal[BCS] = GEN6_NOSYNC; > + ring->semaphore.mbox.signal[VECS] = GEN6_NOSYNC; > + } > + } else if (INTEL_INFO(dev)->gen >= 6) { > ring->add_request = gen6_add_request; > ring->flush = gen7_render_ring_flush; > if (INTEL_INFO(dev)->gen == 6) > ring->flush = gen6_render_ring_flush; > - if (INTEL_INFO(dev)->gen >= 8) { > - ring->flush = gen8_render_ring_flush; > - ring->irq_get = gen8_ring_get_irq; > - ring->irq_put = gen8_ring_put_irq; > - } else { > - ring->irq_get = gen6_ring_get_irq; > - ring->irq_put = gen6_ring_put_irq; > - } > + ring->irq_get = gen6_ring_get_irq; > + ring->irq_put = gen6_ring_put_irq; > ring->irq_enable_mask = GT_RENDER_USER_INTERRUPT; > ring->get_seqno = gen6_ring_get_seqno; > ring->set_seqno = ring_set_seqno; > @@ -1925,6 +1940,7 @@ int intel_init_render_ring_buffer(struct drm_device *dev) > ring->irq_enable_mask = I915_USER_INTERRUPT; > } > ring->write_tail = ring_write_tail; > + > if (IS_HASWELL(dev)) > ring->dispatch_execbuffer = hsw_ring_dispatch_execbuffer; > else if (IS_GEN8(dev)) > @@ -2058,24 +2074,36 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev) > ring->irq_put = gen8_ring_put_irq; > ring->dispatch_execbuffer = > gen8_ring_dispatch_execbuffer; > + if (i915_semaphore_is_enabled(dev)) { > + ring->semaphore.sync_to = gen6_ring_sync; > + ring->semaphore.signal = gen6_signal; > + ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_INVALID; > + ring->semaphore.mbox.wait[VCS] = MI_SEMAPHORE_SYNC_INVALID; > + ring->semaphore.mbox.wait[BCS] = MI_SEMAPHORE_SYNC_INVALID; > + ring->semaphore.mbox.wait[VECS] = MI_SEMAPHORE_SYNC_INVALID; > + ring->semaphore.mbox.signal[RCS] = GEN6_NOSYNC; > + ring->semaphore.mbox.signal[VCS] = GEN6_NOSYNC; > + ring->semaphore.mbox.signal[BCS] = GEN6_NOSYNC; > + ring->semaphore.mbox.signal[VECS] = GEN6_NOSYNC; > + } > } else { > ring->irq_enable_mask = GT_BSD_USER_INTERRUPT; > ring->irq_get = gen6_ring_get_irq; > ring->irq_put = gen6_ring_put_irq; > ring->dispatch_execbuffer = > gen6_ring_dispatch_execbuffer; > - } > - if (i915_semaphore_is_enabled(dev)) { > - ring->semaphore.sync_to = gen6_ring_sync; > - ring->semaphore.signal = gen6_signal; > - ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_VR; > - ring->semaphore.mbox.wait[VCS] = MI_SEMAPHORE_SYNC_INVALID; > - ring->semaphore.mbox.wait[BCS] = MI_SEMAPHORE_SYNC_VB; > - ring->semaphore.mbox.wait[VECS] = MI_SEMAPHORE_SYNC_VVE; > - ring->semaphore.mbox.signal[RCS] = GEN6_RVSYNC; > - ring->semaphore.mbox.signal[VCS] = GEN6_NOSYNC; > - ring->semaphore.mbox.signal[BCS] = GEN6_BVSYNC; > - ring->semaphore.mbox.signal[VECS] = GEN6_VEVSYNC; > + if (i915_semaphore_is_enabled(dev)) { > + ring->semaphore.sync_to = gen6_ring_sync; > + ring->semaphore.signal = gen6_signal; > + ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_VR; > + ring->semaphore.mbox.wait[VCS] = MI_SEMAPHORE_SYNC_INVALID; > + ring->semaphore.mbox.wait[BCS] = MI_SEMAPHORE_SYNC_VB; > + ring->semaphore.mbox.wait[VECS] = MI_SEMAPHORE_SYNC_VVE; > + ring->semaphore.mbox.signal[RCS] = GEN6_RVSYNC; > + ring->semaphore.mbox.signal[VCS] = GEN6_NOSYNC; > + ring->semaphore.mbox.signal[BCS] = GEN6_BVSYNC; > + ring->semaphore.mbox.signal[VECS] = GEN6_VEVSYNC; > + } > } > } else { > ring->mmio_base = BSD_RING_BASE; > @@ -2119,23 +2147,35 @@ int intel_init_blt_ring_buffer(struct drm_device *dev) > ring->irq_get = gen8_ring_get_irq; > ring->irq_put = gen8_ring_put_irq; > ring->dispatch_execbuffer = gen8_ring_dispatch_execbuffer; > + if (i915_semaphore_is_enabled(dev)) { > + ring->semaphore.sync_to = gen6_ring_sync; > + ring->semaphore.signal = gen6_signal; > + ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_INVALID; > + ring->semaphore.mbox.wait[VCS] = MI_SEMAPHORE_SYNC_INVALID; > + ring->semaphore.mbox.wait[BCS] = MI_SEMAPHORE_SYNC_INVALID; > + ring->semaphore.mbox.wait[VECS] = MI_SEMAPHORE_SYNC_INVALID; > + ring->semaphore.mbox.signal[RCS] = GEN6_NOSYNC; > + ring->semaphore.mbox.signal[VCS] = GEN6_NOSYNC; > + ring->semaphore.mbox.signal[BCS] = GEN6_NOSYNC; > + ring->semaphore.mbox.signal[VECS] = GEN6_NOSYNC; > + } > } else { > ring->irq_enable_mask = GT_BLT_USER_INTERRUPT; > ring->irq_get = gen6_ring_get_irq; > ring->irq_put = gen6_ring_put_irq; > ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer; > - } > - if (i915_semaphore_is_enabled(dev)) { > - ring->semaphore.signal = gen6_signal; > - ring->semaphore.sync_to = gen6_ring_sync; > - ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_BR; > - ring->semaphore.mbox.wait[VCS] = MI_SEMAPHORE_SYNC_BV; > - ring->semaphore.mbox.wait[BCS] = MI_SEMAPHORE_SYNC_INVALID; > - ring->semaphore.mbox.wait[VECS] = MI_SEMAPHORE_SYNC_BVE; > - ring->semaphore.mbox.signal[RCS] = GEN6_RBSYNC; > - ring->semaphore.mbox.signal[VCS] = GEN6_VBSYNC; > - ring->semaphore.mbox.signal[BCS] = GEN6_NOSYNC; > - ring->semaphore.mbox.signal[VECS] = GEN6_VEBSYNC; > + if (i915_semaphore_is_enabled(dev)) { > + ring->semaphore.signal = gen6_signal; > + ring->semaphore.sync_to = gen6_ring_sync; > + ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_BR; > + ring->semaphore.mbox.wait[VCS] = MI_SEMAPHORE_SYNC_BV; > + ring->semaphore.mbox.wait[BCS] = MI_SEMAPHORE_SYNC_INVALID; > + ring->semaphore.mbox.wait[VECS] = MI_SEMAPHORE_SYNC_BVE; > + ring->semaphore.mbox.signal[RCS] = GEN6_RBSYNC; > + ring->semaphore.mbox.signal[VCS] = GEN6_VBSYNC; > + ring->semaphore.mbox.signal[BCS] = GEN6_NOSYNC; > + ring->semaphore.mbox.signal[VECS] = GEN6_VEBSYNC; > + } > } > ring->init = init_ring_common; > > @@ -2163,23 +2203,35 @@ int intel_init_vebox_ring_buffer(struct drm_device *dev) > ring->irq_get = gen8_ring_get_irq; > ring->irq_put = gen8_ring_put_irq; > ring->dispatch_execbuffer = gen8_ring_dispatch_execbuffer; > + if (i915_semaphore_is_enabled(dev)) { > + ring->semaphore.sync_to = gen6_ring_sync; > + ring->semaphore.signal = gen6_signal; > + ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_INVALID; > + ring->semaphore.mbox.wait[VCS] = MI_SEMAPHORE_SYNC_INVALID; > + ring->semaphore.mbox.wait[BCS] = MI_SEMAPHORE_SYNC_INVALID; > + ring->semaphore.mbox.wait[VECS] = MI_SEMAPHORE_SYNC_INVALID; > + ring->semaphore.mbox.signal[RCS] = GEN6_NOSYNC; > + ring->semaphore.mbox.signal[VCS] = GEN6_NOSYNC; > + ring->semaphore.mbox.signal[BCS] = GEN6_NOSYNC; > + ring->semaphore.mbox.signal[VECS] = GEN6_NOSYNC; > + } > } else { > ring->irq_enable_mask = PM_VEBOX_USER_INTERRUPT; > ring->irq_get = hsw_vebox_get_irq; > ring->irq_put = hsw_vebox_put_irq; > ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer; > - } > - if (i915_semaphore_is_enabled(dev)) { > - ring->semaphore.sync_to = gen6_ring_sync; > - ring->semaphore.signal = gen6_signal; > - ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_VER; > - ring->semaphore.mbox.wait[VCS] = MI_SEMAPHORE_SYNC_VEV; > - ring->semaphore.mbox.wait[BCS] = MI_SEMAPHORE_SYNC_VEB; > - ring->semaphore.mbox.wait[VECS] = MI_SEMAPHORE_SYNC_INVALID; > - ring->semaphore.mbox.signal[RCS] = GEN6_RVESYNC; > - ring->semaphore.mbox.signal[VCS] = GEN6_VVESYNC; > - ring->semaphore.mbox.signal[BCS] = GEN6_BVESYNC; > - ring->semaphore.mbox.signal[VECS] = GEN6_NOSYNC; > + if (i915_semaphore_is_enabled(dev)) { > + ring->semaphore.sync_to = gen6_ring_sync; > + ring->semaphore.signal = gen6_signal; > + ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_VER; > + ring->semaphore.mbox.wait[VCS] = MI_SEMAPHORE_SYNC_VEV; > + ring->semaphore.mbox.wait[BCS] = MI_SEMAPHORE_SYNC_VEB; > + ring->semaphore.mbox.wait[VECS] = MI_SEMAPHORE_SYNC_INVALID; > + ring->semaphore.mbox.signal[RCS] = GEN6_RVESYNC; > + ring->semaphore.mbox.signal[VCS] = GEN6_VVESYNC; > + ring->semaphore.mbox.signal[BCS] = GEN6_BVESYNC; > + ring->semaphore.mbox.signal[VECS] = GEN6_NOSYNC; > + } > } > ring->init = init_ring_common; > > -- > 1.9.0 -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx