On Thu, Feb 06, 2014 at 11:42:39AM -0200, Rodrigo Vivi wrote:
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
>
> On Wed, Jan 29, 2014 at 2:25 AM, Ben Widawsky
> <benjamin.widawsky@xxxxxxxxx> wrote:
> > Signed-off-by: Ben Widawsky <ben@xxxxxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 6 +++---
> > 1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 944b99c..6acb429 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -3215,10 +3215,10 @@ static void gen8_enable_rps(struct drm_device *dev)
> > /* 3: Enable RC6 */
> > if (intel_enable_rc6(dev) & INTEL_RC6_ENABLE)
> > rc6_mask = GEN6_RC_CTL_RC6_ENABLE;
> > - DRM_INFO("RC6 %s\n", (rc6_mask & GEN6_RC_CTL_RC6_ENABLE) ? "on" : "off");
> > + intel_print_rc6_info(dev, rc6_mask);
> > I915_WRITE(GEN6_RC_CONTROL, GEN6_RC_CTL_HW_ENABLE |
> > - GEN6_RC_CTL_EI_MODE(1) |
> > - rc6_mask);
> > + GEN6_RC_CTL_EI_MODE(1) |
> > + rc6_mask);
> >
> > /* 4 Program defaults and thresholds for RPS*/
> > I915_WRITE(GEN6_RPNSWREQ, HSW_FREQUENCY(10)); /* Request 500 MHz */
> > --
> > 1.8.5.3
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Merged up to this patch, but after that it gets confusing:
- I have two patches 5/9.
- 6/9 lacks review ...
Mailing-list grues ate something?
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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