On Mon, Feb 10, 2014 at 02:33:07PM +0000, Damien Lespiau wrote: > On Fri, Jan 17, 2014 at 01:51:12PM -0200, Paulo Zanoni wrote: > > From: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > > > > Add a nice comment explaining why we shouldn't wait for a vblank on > > all cases, wait based on the HW gen, and add a comment saying we > > should probably skip that wait on some of the previous HW gens. > > > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > > > Reviewed-by: Damien Lespiau <damien.lespiau@xxxxxxxxx> > > Looking at BSpec for info on this, I didn't find any mention of having > to wait of a vblank indeed. There's a nice workaround we don't seem to > implement though (underrun when switching from one to multi-pipes, > display buffer related). I'm sure that's somewhere in a TODO list :) We implement something for HSW, but I'm not sure it's quite enough. In any case I have patches lined up for disabling LP1+ watermarks when doing one<->many pipes switch for PCH platforms. Which reminds I need to stop slacking off and get those posted soon. -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
