Apparently it's broken in the exact same way as the gmbus irq. For
reference of the full story see
commit c12aba5aa0e60b7947bc8b6ea25ef55c4acf81a4
Author: Jiri Kosina <jkosina@xxxxxxx>
Date: Tue Mar 19 09:56:57 2013 +0100
drm/i915: stop using GMBUS IRQs on Gen4 chips
The effect is that we have a storm of unclaimed interrupts on the
legacy irq line. If that one is used by a different device then the
kernel will complain and rather quickly kill the irq source. Which
breaks any device trying to actually use the legacy irq line.
This regression has been introduced
commit 4aeebd7443e36b0a40032e518a9338f48bd27efc
Author: Daniel Vetter <daniel.vetter@xxxxxxxx>
Date: Thu Oct 31 09:53:36 2013 +0100
drm/i915: dp aux irq support for g4x/vlv
v2: Cross-reference dp aux and gmbus gen4 comments.
Cc: Jani Nikula <jani.nikula@xxxxxxxxx>
Cc: Jiri Kosina <jkosina@xxxxxxx>
Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
Reported-and-tested-by: Jiri Kosina <jkosina@xxxxxxx>
Signed-off-by: Daniel Vetter <daniel.vetter@xxxxxxxx>
---
drivers/gpu/drm/i915/intel_dp.c | 10 +++++++++-
drivers/gpu/drm/i915/intel_i2c.c | 7 ++++---
2 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index c00b6e352c2b..341da95ddc87 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -390,6 +390,14 @@ static uint32_t get_aux_clock_divider(struct intel_dp *intel_dp,
}
}
+/*
+ * dp aux on gen4 seems to be able to generate legacy interrupts even when in MSI
+ * mode (similar to how gmbus is broken). This results in spurious interrupt
+ * warnings if the legacy irq no. is shared with another device. The kernel then
+ * disables that interrupt source and so prevents the other device from working
+ * properly.
+ */
+#define HAS_AUX_IRQ(dev) (INTEL_INFO(dev)->gen >= 5)
static int
intel_dp_aux_ch(struct intel_dp *intel_dp,
uint8_t *send, int send_bytes,
@@ -404,7 +412,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
int i, ret, recv_bytes;
uint32_t status;
int try, precharge, clock = 0;
- bool has_aux_irq = true;
+ bool has_aux_irq = HAS_AUX_IRQ(dev);
uint32_t timeout;
/* dp aux is extremely sensitive to irq latency, hence request the
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index b1dc33f47899..1a3d512e4efa 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -260,9 +260,10 @@ intel_gpio_setup(struct intel_gmbus *bus, u32 pin)
/*
* gmbus on gen4 seems to be able to generate legacy interrupts even when in MSI
- * mode. This results in spurious interrupt warnings if the legacy irq no. is
- * shared with another device. The kernel then disables that interrupt source
- * and so prevents the other device from working properly.
+ * mode (similar to how dp aux is broken). This results in spurious interrupt
+ * warnings if the legacy irq no. is shared with another device. The kernel then
+ * disables that interrupt source and so prevents the other device from working
+ * properly.
*/
#define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 5)
static int
--
1.8.5.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
