On Tue, Feb 04, 2014 at 11:32:31AM -0600, jeff.mcgee@xxxxxxxxx wrote: > From: Jeff McGee <jeff.mcgee@xxxxxxxxx> > > A check of rps/rc6 state after i915_reset determined that the ring > MAX_IDLE registers were returned to their hardware defaults and that > the GEN6_PMIMR register was set to mask all interrupts. This change > restores those values to their pre-reset states by re-initializing > rps/rc6 in i915_reset. A full re-initialization was opted for versus > a targeted set of restore operations for simplicity and maintain- > ability. Note that the re-initialization is not done for Ironlake, > due to a past comment that it causes problems. > > Also updated the rps initialization sequence to preserve existing > min/max values in the case of a re-init. We assume the values were > validated upon being set and do not do further range checking. The > debugfs interface for changing min/max was updated with range > checking to ensure this condition (already present in sysfs > interface). > > v2: fix rps logging to output hw_max and hw_min, not rps.max_delay > and rps.min_delay which don't strictly represent hardware limits. > Add igt testcase to signed-off-by section. > > Testcase: igt/pm_rps/reset > Signed-off-by: Jeff McGee <jeff.mcgee@xxxxxxxxx> Queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
