On Wed, Jan 29, 2014 at 2:25 AM, Ben Widawsky
<benjamin.widawsky@xxxxxxxxx> wrote:
> Signed-off-by: Ben Widawsky <ben@xxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 20 +++++++++++++-------
> 1 file changed, 13 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 6acb429..ae59bd9 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3184,6 +3184,17 @@ static void gen6_enable_rps_interrupts(struct drm_device *dev)
> I915_WRITE(GEN6_PMINTRMSK, ~enabled_intrs);
> }
>
> +static void parse_rp_state_cap(struct drm_i915_private *dev_priv, u32 rp_state_cap)
line over 80, but meh
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> +{
> + /* In units of 50MHz */
> + dev_priv->rps.hw_max = dev_priv->rps.max_delay = rp_state_cap & 0xff;
> + dev_priv->rps.min_delay = (rp_state_cap >> 16) & 0xff;
> + dev_priv->rps.rp1_delay = (rp_state_cap >> 8) & 0xff;
> + dev_priv->rps.rp0_delay = (rp_state_cap >> 0) & 0xff;
> + dev_priv->rps.rpe_delay = dev_priv->rps.rp1_delay;
> + dev_priv->rps.cur_delay = 0;
> +}
> +
> static void gen8_enable_rps(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -3202,6 +3213,7 @@ static void gen8_enable_rps(struct drm_device *dev)
> I915_WRITE(GEN6_RC_CONTROL, 0);
>
> rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
> + parse_rp_state_cap(dev_priv, rp_state_cap);
>
> /* 2b: Program RC6 thresholds.*/
> I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 40 << 16);
> @@ -3288,13 +3300,7 @@ static void gen6_enable_rps(struct drm_device *dev)
> rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
> gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
>
> - /* In units of 50MHz */
> - dev_priv->rps.hw_max = dev_priv->rps.max_delay = rp_state_cap & 0xff;
> - dev_priv->rps.min_delay = (rp_state_cap >> 16) & 0xff;
> - dev_priv->rps.rp1_delay = (rp_state_cap >> 8) & 0xff;
> - dev_priv->rps.rp0_delay = (rp_state_cap >> 0) & 0xff;
> - dev_priv->rps.rpe_delay = dev_priv->rps.rp1_delay;
> - dev_priv->rps.cur_delay = 0;
> + parse_rp_state_cap(dev_priv, rp_state_cap);
>
> /* disable the counters and set deterministic thresholds */
> I915_WRITE(GEN6_RC_CONTROL, 0);
> --
> 1.8.5.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
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