On Wed, Jan 29, 2014 at 06:23:40PM -0800, Matt Turner wrote: > On Wed, Jan 29, 2014 at 9:56 AM, Daniel Vetter <daniel@xxxxxxxx> wrote: > > On Tue, Jan 28, 2014 at 6:29 AM, Chia-I Wu <olvaffe@xxxxxxxxx> wrote: > >> From: Chia-I Wu <olv@xxxxxxxxxx> > >> > >> The optimization is available on Ivy Bridge and later, and is disabled by > >> default. Enabling it helps certain workloads such as GLBenchmark TRex test. > >> > >> No piglit regression. > >> > >> v2 > >> - no need to save the register before suspend as init_clock_gating can > >> correctly program it after resume > >> - split IVB change to another commit > >> > >> Signed-off-by: Chia-I Wu <olv@xxxxxxxxxx> > > > > What about byt? > > -Daniel > > In the previous thread, Ville pointed out that the documentation > doesn't say anything about BYT for this bit, so it's unknown whether > it's supported, and Chia-I said > > > Though I will leave BDW/VLV out as I do not have the hardware. > > I do have BYT, so I'll check it out, but this patch can go in without > it that information, since Chia-I took Ville's advice and split the > patches into per-generation hunks. Make sense. Patches merged and I'll happily pull in the byt update if that one checks out ok. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
