On Thu, Jan 30, 2014 at 12:19:40AM -0800, Ben Widawsky wrote: > v2: Rebased upon cleaned up error state > v3: Make sure hangcheck info remains last (Chris) > > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Signed-off-by: Ben Widawsky <ben@xxxxxxxxxxxx> Pulled in entire series with Chris' irc ack on the remaining two patches. Note that there have been a few conflicts aroung ring_error_state->valid (dunno how that happen, I guess this series wasn't strictly based on -nightly), please double-check things. Thanks, Daniel > --- > drivers/gpu/drm/i915/i915_drv.h | 9 +++++++++ > drivers/gpu/drm/i915/i915_gpu_error.c | 37 +++++++++++++++++++++++++++++++++++ > 2 files changed, 46 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index e41f30a..3035bf3 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -361,6 +361,14 @@ struct drm_i915_error_state { > u32 seqno; > u32 tail; > } *requests; > + > + struct { > + u32 gfx_mode; > + union { > + u64 pdp[4]; > + u32 pp_dir_base; > + }; > + } vm_info; > } ring[I915_NUM_RINGS]; > > struct drm_i915_error_buffer { > @@ -378,6 +386,7 @@ struct drm_i915_error_state { > s32 ring:4; > u32 cache_level:3; > } **active_bo, **pinned_bo; > + > u32 *active_bo_count, *pinned_bo_count; > u32 vm_count; > }; > diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c > index 4c3ca11..9d04e6a 100644 > --- a/drivers/gpu/drm/i915/i915_gpu_error.c > +++ b/drivers/gpu/drm/i915/i915_gpu_error.c > @@ -270,6 +270,19 @@ static void i915_ring_error_state(struct drm_i915_error_state_buf *m, > ring->semaphore_seqno[2]); > } > } > + if (USES_PPGTT(dev)) { > + err_printf(m, " GFX_MODE: 0x%08x\n", ring->vm_info.gfx_mode); > + > + if (INTEL_INFO(dev)->gen >= 8) { > + int i; > + for (i = 0; i < 4; i++) > + err_printf(m, " PDP%d: 0x%016llx\n", > + i, ring->vm_info.pdp[i]); > + } else { > + err_printf(m, " PP_DIR_BASE: 0x%08x\n", > + ring->vm_info.pp_dir_base); > + } > + } > err_printf(m, " seqno: 0x%08x\n", ring->seqno); > err_printf(m, " waiting: %s\n", yesno(ring->waiting)); > err_printf(m, " ring->head: 0x%08x\n", ring->cpu_ring_head); > @@ -847,6 +860,30 @@ static void i915_record_ring_state(struct drm_device *dev, > > ering->hangcheck_score = ring->hangcheck.score; > ering->hangcheck_action = ring->hangcheck.action; > + > + if (USES_PPGTT(dev)) { > + int i; > + > + ering->vm_info.gfx_mode = I915_READ(RING_MODE_GEN7(ring)); > + > + switch (INTEL_INFO(dev)->gen) { > + case 8: > + for (i = 0; i < 4; i++) { > + ering->vm_info.pdp[i] = > + I915_READ(GEN8_RING_PDP_UDW(ring, i)); > + ering->vm_info.pdp[i] <<= 32; > + ering->vm_info.pdp[i] |= > + I915_READ(GEN8_RING_PDP_LDW(ring, i)); > + } > + break; > + case 7: > + ering->vm_info.pp_dir_base = RING_PP_DIR_BASE(ring); > + break; > + case 6: > + ering->vm_info.pp_dir_base = RING_PP_DIR_BASE_READ(ring); > + break; > + } > + } > } > > > -- > 1.8.5.3 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx