On Wed, Jan 29, 2014 at 12:22:44PM -0800, Ben Widawsky wrote: > Blargh.... this isn't specific to HSW. Title should be s/HSW/gen6|gen7/ Fixed and merged to dinq. -Daniel > > On Wed, Jan 29, 2014 at 12:20:54PM -0800, Ben Widawsky wrote: > > We need to do the print after we've done the math. > > > > This was broken when we introduced VLV support. Personally, I think the > > interface should go away now that we support it in sysfs. Historically > > it has allowed users to do stupid things which we might not allow in the > > sysfs interface - so we can keep it I guess. > > > > commit 0a073b843bcd9a660f76e497182aac97cafddc4c > > Author: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> > > Date: Wed Apr 17 15:54:58 2013 -0700 > > > > drm/i915: turbo & RC6 support for VLV v7 > > > > Reported-by: Rao, Ram R <ram.r.rao@xxxxxxxxx> > > Signed-off-by: Ben Widawsky <ben@xxxxxxxxxxxx> > > --- > > drivers/gpu/drm/i915/i915_debugfs.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > > index bc8707f..3487b71 100644 > > --- a/drivers/gpu/drm/i915/i915_debugfs.c > > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > > @@ -3230,8 +3230,6 @@ i915_max_freq_set(void *data, u64 val) > > > > flush_delayed_work(&dev_priv->rps.delayed_resume_work); > > > > - DRM_DEBUG_DRIVER("Manually setting max freq to %llu\n", val); > > - > > ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock); > > if (ret) > > return ret; > > @@ -3249,6 +3247,8 @@ i915_max_freq_set(void *data, u64 val) > > gen6_set_rps(dev, val); > > } > > > > + DRM_DEBUG_DRIVER("Manually set max freq to %llu\n", val); > > + > > mutex_unlock(&dev_priv->rps.hw_lock); > > > > return 0; > > -- > > 1.8.5.3 > > > > -- > Ben Widawsky, Intel Open Source Technology Center > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx