On Tue, Jan 28, 2014 at 04:13:52PM +0200, Ville Syrjälä wrote: > On Tue, Jan 28, 2014 at 02:24:42PM +0100, Daniel Vetter wrote: > > On Wed, Jan 22, 2014 at 09:32:52PM +0200, ville.syrjala@xxxxxxxxxxxxxxx wrote: > > > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > > > > WaApplyL3ControlAndL3ChickenMode is only listed for IVB and HSW in > > > W/A database and BSpec. > > > > > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > --- > > > drivers/gpu/drm/i915/intel_pm.c | 2 -- > > > 1 file changed, 2 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > > > index 895046f..62d339b 100644 > > > --- a/drivers/gpu/drm/i915/intel_pm.c > > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > > @@ -4930,8 +4930,6 @@ static void valleyview_init_clock_gating(struct drm_device *dev) > > > > > > /* WaDisableL3CacheAging:vlv */ > > > I915_WRITE(GEN7_L3CNTLREG1, I915_READ(GEN7_L3CNTLREG1) | GEN7_L3AGDIS); > > > - /* WaApplyL3ControlAndL3ChickenMode:vlv */ > > > - I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER, GEN7_WA_L3_CHICKEN_MODE); > > > > This one doesn't seem to be here ... is some earlier patch which I haven't > > merged yet adding this? Can't we just fold this in? > > ? I see you alreay applied this patch. Are ou trying to put it in twice? > IIRC in the past we applied one workaround three times, now we're trying > to not apply one twice :) Oh right, Rodrigo reviewed this one yesterday already. Sorry for the confusion ;-) -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx