For this and next one: According to wa_database this wa seems relevant for all gt, right? On Wed, Jan 22, 2014 at 5:32 PM, <ville.syrjala@xxxxxxxxxxxxxxx> wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > WaDisableRCCUnitClockGating is only relevant for SNB. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_pm.c | 6 +----- > 1 file changed, 1 insertion(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index f40dd1b..1e1c1b1 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4860,15 +4860,11 @@ static void ivybridge_init_clock_gating(struct drm_device *dev) > * Sanctuary and Tropics, and apparently anything else with > * alpha test or pixel discard. > * > - * According to the spec, bit 11 (RCCUNIT) must also be set, > - * but we didn't debug actual testcases to find it out. > - * > * According to the spec, bit 13 (RCZUNIT) must be set on IVB. > * This implements the WaDisableRCZUnitClockGating:ivb workaround. > */ > I915_WRITE(GEN6_UCGCTL2, > - GEN6_RCZUNIT_CLOCK_GATE_DISABLE | > - GEN6_RCCUNIT_CLOCK_GATE_DISABLE); > + GEN6_RCZUNIT_CLOCK_GATE_DISABLE); > > /* This is required by WaCatErrorRejectionIssue:ivb */ > I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG, > -- > 1.8.3.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Rodrigo Vivi Blog: http://blog.vivi.eng.br _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
