On Wed, Jan 22, 2014 at 5:32 PM, <ville.syrjala@xxxxxxxxxxxxxxx> wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_reg.h | 3 +++ > drivers/gpu/drm/i915/intel_pm.c | 6 ++++++ > 2 files changed, 9 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 242f540..c3039e1 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -4126,6 +4126,9 @@ > #define COMMON_SLICE_CHICKEN2 0x7014 > # define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE (1<<0) > > +#define GEN7_L3SQCREG1 0xB010 > +#define VLV_B0_WA_L3SQCREG1_VALUE 0x00D30000 where did you get this value? All I see on wa_database was "L3Sqc Register will be having a different value from VLVB0." so I wonder if I'm looking to a different and wrong place. please point me to the correct one > + > #define GEN7_L3CNTLREG1 0xB01C > #define GEN7_WA_FOR_GEN7_L3_CONTROL 0x3C4FFF8C > #define GEN7_L3AGDIS (1<<19) > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 6781845..4a1f849 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4992,6 +4992,12 @@ static void valleyview_init_clock_gating(struct drm_device *dev) > _MASKED_BIT_ENABLE(PIXEL_SUBSPAN_COLLECT_OPT_DISABLE)); > > /* > + * WaIncreaseL3CreditsForVLVB0:vlv > + * This is the hardware default actually. > + */ > + I915_WRITE(GEN7_L3SQCREG1, VLV_B0_WA_L3SQCREG1_VALUE); > + > + /* > * WaDisableVLVClockGating_VBIIssue:vlv > * Disable clock gating on th GCFG unit to prevent a delay > * in the reporting of vblank events. > -- > 1.8.3.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Rodrigo Vivi Blog: http://blog.vivi.eng.br _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
