2014/1/17 <ville.syrjala@xxxxxxxxxxxxxxx>: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > I want to see these without having full debugs enabled. You missed gen8_irq_handler(). With that fixed: Reviewed-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> I guess this could easily be done by Daniel when applying the patch. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_irq.c | 26 +++++++++++++------------- > 1 file changed, 13 insertions(+), 13 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index e5cba0b..391cacd 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -1472,7 +1472,7 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg) > > if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS && > intel_set_cpu_fifo_underrun_reporting(dev, pipe, false)) > - DRM_DEBUG_DRIVER("pipe %c underrun\n", pipe_name(pipe)); > + DRM_ERROR("pipe %c underrun\n", pipe_name(pipe)); > } > > /* Consume port. Then clear IIR or we'll miss events */ > @@ -1552,12 +1552,12 @@ static void ibx_irq_handler(struct drm_device *dev, u32 pch_iir) > if (pch_iir & SDE_TRANSA_FIFO_UNDER) > if (intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_A, > false)) > - DRM_DEBUG_DRIVER("PCH transcoder A FIFO underrun\n"); > + DRM_ERROR("PCH transcoder A FIFO underrun\n"); > > if (pch_iir & SDE_TRANSB_FIFO_UNDER) > if (intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_B, > false)) > - DRM_DEBUG_DRIVER("PCH transcoder B FIFO underrun\n"); > + DRM_ERROR("PCH transcoder B FIFO underrun\n"); > } > > static void ivb_err_int_handler(struct drm_device *dev) > @@ -1573,8 +1573,8 @@ static void ivb_err_int_handler(struct drm_device *dev) > if (err_int & ERR_INT_FIFO_UNDERRUN(pipe)) { > if (intel_set_cpu_fifo_underrun_reporting(dev, pipe, > false)) > - DRM_DEBUG_DRIVER("Pipe %c FIFO underrun\n", > - pipe_name(pipe)); > + DRM_ERROR("Pipe %c FIFO underrun\n", > + pipe_name(pipe)); > } > > if (err_int & ERR_INT_PIPE_CRC_DONE(pipe)) { > @@ -1599,17 +1599,17 @@ static void cpt_serr_int_handler(struct drm_device *dev) > if (serr_int & SERR_INT_TRANS_A_FIFO_UNDERRUN) > if (intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_A, > false)) > - DRM_DEBUG_DRIVER("PCH transcoder A FIFO underrun\n"); > + DRM_ERROR("PCH transcoder A FIFO underrun\n"); > > if (serr_int & SERR_INT_TRANS_B_FIFO_UNDERRUN) > if (intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_B, > false)) > - DRM_DEBUG_DRIVER("PCH transcoder B FIFO underrun\n"); > + DRM_ERROR("PCH transcoder B FIFO underrun\n"); > > if (serr_int & SERR_INT_TRANS_C_FIFO_UNDERRUN) > if (intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_C, > false)) > - DRM_DEBUG_DRIVER("PCH transcoder C FIFO underrun\n"); > + DRM_ERROR("PCH transcoder C FIFO underrun\n"); > > I915_WRITE(SERR_INT, serr_int); > } > @@ -1671,8 +1671,8 @@ static void ilk_display_irq_handler(struct drm_device *dev, u32 de_iir) > > if (de_iir & DE_PIPE_FIFO_UNDERRUN(pipe)) > if (intel_set_cpu_fifo_underrun_reporting(dev, pipe, false)) > - DRM_DEBUG_DRIVER("Pipe %c FIFO underrun\n", > - pipe_name(pipe)); > + DRM_ERROR("Pipe %c FIFO underrun\n", > + pipe_name(pipe)); > > if (de_iir & DE_PIPE_CRC_DONE(pipe)) > i9xx_pipe_crc_irq_handler(dev, pipe); > @@ -3229,7 +3229,7 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg) > > if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS && > intel_set_cpu_fifo_underrun_reporting(dev, pipe, false)) > - DRM_DEBUG_DRIVER("pipe %c underrun\n", pipe_name(pipe)); > + DRM_ERROR("pipe %c underrun\n", pipe_name(pipe)); > } > > iir = new_iir; > @@ -3430,7 +3430,7 @@ static irqreturn_t i915_irq_handler(int irq, void *arg) > > if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS && > intel_set_cpu_fifo_underrun_reporting(dev, pipe, false)) > - DRM_DEBUG_DRIVER("pipe %c underrun\n", pipe_name(pipe)); > + DRM_ERROR("pipe %c underrun\n", pipe_name(pipe)); > } > > if (blc_event || (iir & I915_ASLE_INTERRUPT)) > @@ -3678,7 +3678,7 @@ static irqreturn_t i965_irq_handler(int irq, void *arg) > > if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS && > intel_set_cpu_fifo_underrun_reporting(dev, pipe, false)) > - DRM_DEBUG_DRIVER("pipe %c underrun\n", pipe_name(pipe)); > + DRM_ERROR("pipe %c underrun\n", pipe_name(pipe)); > } > > if (blc_event || (iir & I915_ASLE_INTERRUPT)) > -- > 1.8.3.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Paulo Zanoni _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx