v2: Wait psr enable with timeout and more subtest added. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> --- tests/Android.mk | 1 + tests/Makefile.sources | 1 + tests/kms_psr_sink_crc.c | 508 +++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 510 insertions(+) create mode 100644 tests/kms_psr_sink_crc.c diff --git a/tests/Android.mk b/tests/Android.mk index fa9e9d7..81906be 100644 --- a/tests/Android.mk +++ b/tests/Android.mk @@ -95,6 +95,7 @@ skip_tests_list := \ kms_cursor_crc \ kms_flip \ kms_pipe_crc_basic \ + kms_psr_sink_crc \ kms_fbc_crc \ kms_render \ kms_setmode \ diff --git a/tests/Makefile.sources b/tests/Makefile.sources index 5fe68ae..fdb1e41 100644 --- a/tests/Makefile.sources +++ b/tests/Makefile.sources @@ -58,6 +58,7 @@ TESTS_progs_M = \ kms_fbc_crc \ kms_flip \ kms_pipe_crc_basic \ + kms_psr_sink_crc \ kms_render \ kms_setmode \ kms_sink_crc_basic \ diff --git a/tests/kms_psr_sink_crc.c b/tests/kms_psr_sink_crc.c new file mode 100644 index 0000000..f9c650f --- /dev/null +++ b/tests/kms_psr_sink_crc.c @@ -0,0 +1,508 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +#include <errno.h> +#include <stdbool.h> +#include <stdio.h> +#include <string.h> + +#include "drm_fourcc.h" + +#include "drmtest.h" +#include "igt_debugfs.h" +#include "igt_kms.h" +#include "rendercopy.h" + +enum test_mode { + TEST_PAGE_FLIP, + TEST_MMAP_CPU, + TEST_MMAP_GTT, + TEST_BLT, + TEST_RENDER, + TEST_CONTEXT, + TEST_PAGE_FLIP_AND_MMAP_CPU, + TEST_PAGE_FLIP_AND_MMAP_GTT, + TEST_PAGE_FLIP_AND_BLT, + TEST_PAGE_FLIP_AND_RENDER, + TEST_PAGE_FLIP_AND_CONTEXT, + TEST_CURSOR_MOVE, +}; + +typedef struct { + struct kmstest_connector_config config; + drmModeModeInfo mode; + struct kmstest_fb fb[2]; +} connector_t; + +typedef struct { + int drm_fd; + igt_debugfs_t debugfs; + drmModeRes *resources; + drm_intel_bufmgr *bufmgr; + drm_intel_context *ctx[2]; + uint32_t devid; + uint32_t handle[2]; + uint32_t crtc_id; + uint32_t crtc_idx; + uint32_t fb_id[3]; +} data_t; + +static const char *test_mode_str(enum test_mode mode) +{ + static const char * const test_modes[] = { + [TEST_PAGE_FLIP] = "page_flip", + [TEST_MMAP_CPU] = "mmap_cpu", + [TEST_MMAP_GTT] = "mmap_gtt", + [TEST_BLT] = "blt", + [TEST_RENDER] = "render", + [TEST_CONTEXT] = "context", + [TEST_PAGE_FLIP_AND_MMAP_CPU] = "page_flip_and_mmap_cpu", + [TEST_PAGE_FLIP_AND_MMAP_GTT] = "page_flip_and_mmap_gtt", + [TEST_PAGE_FLIP_AND_BLT] = "page_flip_and_blt", + [TEST_PAGE_FLIP_AND_RENDER] = "page_flip_and_render", + [TEST_PAGE_FLIP_AND_CONTEXT] = "page_flip_and_context", + [TEST_CURSOR_MOVE] = "cursor_move", + }; + + return test_modes[mode]; +} + +static uint32_t create_fb(data_t *data, + int w, int h, + double r, double g, double b, + struct kmstest_fb *fb) +{ + uint32_t fb_id; + cairo_t *cr; + + fb_id = kmstest_create_fb2(data->drm_fd, w, h, + DRM_FORMAT_XRGB8888, true, fb); + igt_assert(fb_id); + + cr = kmstest_get_cairo_ctx(data->drm_fd, fb); + kmstest_paint_color(cr, 0, 0, w, h, r, g, b); + igt_assert(cairo_status(cr) == 0); + cairo_destroy(cr); + + return fb_id; +} + +static void create_cursor_fb(data_t *data, struct kmstest_fb *fb) +{ + cairo_t *cr; + + data->fb_id[2] = kmstest_create_fb2(data->drm_fd, 64, 64, + DRM_FORMAT_ARGB8888, false, + fb); + igt_assert(data->fb_id[2]); + + cr = kmstest_get_cairo_ctx(data->drm_fd, fb); + kmstest_paint_color_alpha(cr, 0, 0, 64, 64, 1.0, 1.0, 1.0, 1.0); + igt_assert(cairo_status(cr) == 0); +} + +static bool +connector_set_mode(data_t *data, connector_t *connector, + drmModeModeInfo *mode, uint32_t fb_id) +{ + struct kmstest_connector_config *config = &connector->config; + int ret; + +#if 0 + fprintf(stdout, "Using pipe %c, %dx%d\n", pipe_name(config->pipe), + mode->hdisplay, mode->vdisplay); +#endif + + ret = drmModeSetCrtc(data->drm_fd, + config->crtc->crtc_id, + fb_id, + 0, 0, /* x, y */ + &config->connector->connector_id, + 1, + mode); + igt_assert(ret == 0); + + return 0; +} + +static void display_init(data_t *data) +{ + data->resources = drmModeGetResources(data->drm_fd); + igt_assert(data->resources); +} + +static void display_fini(data_t *data) +{ + drmModeSetCursor(data->drm_fd, data->crtc_id, 0, 0, 0); + drmModeFreeResources(data->resources); +} + +static void fill_blt(data_t *data, uint32_t handle, unsigned char color) +{ + drm_intel_bo *dst = gem_handle_to_libdrm_bo(data->bufmgr, + data->drm_fd, + "", handle); + struct intel_batchbuffer *batch; + + batch = intel_batchbuffer_alloc(data->bufmgr, data->devid); + igt_assert(batch); + + BEGIN_BATCH(5); + OUT_BATCH(COLOR_BLT_CMD); + OUT_BATCH((1 << 24) | (0xf0 << 16) | 0); + OUT_BATCH(1 << 16 | 4); + OUT_RELOC(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + OUT_BATCH(color); + ADVANCE_BATCH(); + + intel_batchbuffer_flush(batch); + intel_batchbuffer_free(batch); + + gem_bo_busy(data->drm_fd, handle); +} + +static void scratch_buf_init(struct scratch_buf *buf, drm_intel_bo *bo) +{ + buf->bo = bo; + buf->stride = 4096; + buf->tiling = I915_TILING_X; + buf->size = 4096; +} + +static void exec_nop(data_t *data, uint32_t handle, drm_intel_context *context) +{ + drm_intel_bo *dst; + struct intel_batchbuffer *batch; + + dst = gem_handle_to_libdrm_bo(data->bufmgr, data->drm_fd, "", handle); + igt_assert(dst); + + batch = intel_batchbuffer_alloc(data->bufmgr, data->devid); + igt_assert(batch); + + /* add the reloc to make sure the kernel will think we write to dst */ + BEGIN_BATCH(4); + OUT_BATCH(MI_BATCH_BUFFER_END); + OUT_BATCH(MI_NOOP); + OUT_RELOC(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + OUT_BATCH(MI_NOOP); + ADVANCE_BATCH(); + + intel_batchbuffer_flush_with_context(batch, context); + intel_batchbuffer_free(batch); +} + +static void fill_render(data_t *data, uint32_t handle, + drm_intel_context *context, unsigned char color) +{ + drm_intel_bo *src, *dst; + struct intel_batchbuffer *batch; + struct scratch_buf src_buf, dst_buf; + const uint8_t buf[4] = { color, color, color, color }; + render_copyfunc_t rendercopy = get_render_copyfunc(data->devid); + + igt_skip_on(!rendercopy); + + dst = gem_handle_to_libdrm_bo(data->bufmgr, data->drm_fd, "", handle); + igt_assert(dst); + + src = drm_intel_bo_alloc(data->bufmgr, "", 4096, 4096); + igt_assert(src); + + gem_write(data->drm_fd, src->handle, 0, buf, 4); + + scratch_buf_init(&src_buf, src); + scratch_buf_init(&dst_buf, dst); + + batch = intel_batchbuffer_alloc(data->bufmgr, data->devid); + igt_assert(batch); + + rendercopy(batch, context, + &src_buf, 0, 0, 1, 1, + &dst_buf, 0, 0); + + intel_batchbuffer_free(batch); + + gem_bo_busy(data->drm_fd, handle); +} + +static bool psr_sink_support(data_t *data) +{ + int ret; + FILE *file; + char str[4]; + + file = igt_debugfs_fopen(&data->debugfs, "i915_edp_psr_status", "r"); + igt_require(file); + + ret = fscanf(file, "Sink_Support: %s\n", str); + if (ret == 0) + igt_skip("i915_edp_psr_status format not supported by this test case\n"); + + fclose(file); + return strcmp(str, "yes") == 0; +} + +static bool psr_enabled(data_t *data) +{ + int ret; + FILE *file; + char str[4]; + + file = igt_debugfs_fopen(&data->debugfs, "i915_edp_psr_status", "r"); + igt_require(file); + + ret = fscanf(file, "Sink_Support: %s\n", str); + igt_assert(ret != 0); + + ret = fscanf(file, "Source_OK: %s\n", str); + igt_assert(ret != 0); + + ret = fscanf(file, "Enabled: %s\n", str); + igt_assert(ret != 0); + + fclose(file); + return strcmp(str, "yes") == 0; +} + +static bool wait_psr_entry(data_t *data, int timeout) +{ + while (timeout--) { + if (psr_enabled(data)) + return true; + sleep(1); + } + return false; +} + +static void get_sink_crc(data_t *data, char *crc) { + int ret; + FILE *file; + + file = igt_debugfs_fopen(&data->debugfs, "i915_sink_crc_eDP1", "r"); + igt_require(file); + + ret = fscanf(file, "%s\n", crc); + igt_require(ret > 0); + + fclose(file); +} + +static void test_crc(data_t *data, enum test_mode mode) +{ + uint32_t handle = data->handle[0]; + char ref_crc[12]; + char crc[12]; + + if (mode == TEST_CURSOR_MOVE) { + igt_assert(drmModeSetCursor(data->drm_fd, data->crtc_id, + handle, 64, 64) == 0); + igt_assert(drmModeMoveCursor(data->drm_fd, data->crtc_id, + 1, 1) == 0); + } + + usleep(300000); + igt_assert(wait_psr_entry(data, 10)); + get_sink_crc(data, ref_crc); + + switch (mode) { + void *ptr; + case TEST_PAGE_FLIP: + igt_assert(drmModePageFlip(data->drm_fd, data->crtc_id, + data->fb_id[1], 0, NULL) == 0); + break; + case TEST_MMAP_CPU: + case TEST_PAGE_FLIP_AND_MMAP_CPU: + ptr = gem_mmap__cpu(data->drm_fd, handle, 4096, PROT_WRITE); + gem_set_domain(data->drm_fd, handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); + memset(ptr, 0xff, 4); + munmap(ptr, 4096); + gem_sw_finish(data->drm_fd, handle); + break; + case TEST_PAGE_FLIP_AND_MMAP_GTT: + handle = data->handle[1]; + igt_assert(drmModePageFlip(data->drm_fd, data->crtc_id, + data->fb_id[1], 0, NULL) == 0); + case TEST_MMAP_GTT: + ptr = gem_mmap__gtt(data->drm_fd, handle, 4096, PROT_WRITE); + gem_set_domain(data->drm_fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); + memset(ptr, 0xff, 4); + munmap(ptr, 4096); + break; + case TEST_BLT: + case TEST_PAGE_FLIP_AND_BLT: + fill_blt(data, handle, 0xff); + break; + case TEST_RENDER: + case TEST_CONTEXT: + case TEST_PAGE_FLIP_AND_RENDER: + case TEST_PAGE_FLIP_AND_CONTEXT: + fill_render(data, handle, + (mode == TEST_CONTEXT || mode == TEST_PAGE_FLIP_AND_CONTEXT) ? + data->ctx[1] : NULL, 0xff); + break; + case TEST_CURSOR_MOVE: + igt_assert(drmModeMoveCursor(data->drm_fd, data->crtc_id, 1, 2) == 0); + break; + } + + get_sink_crc(data, crc); + igt_assert(strcmp(ref_crc, crc) != 0); +} + +static bool prepare_crtc(data_t *data, uint32_t connector_id, enum test_mode mode) +{ + connector_t connector; + int ret; + + ret = kmstest_get_connector_config(data->drm_fd, + connector_id, + 1 << data->crtc_idx, + &connector.config); + if (ret) + return false; + + data->fb_id[0] = create_fb(data, + connector.config.default_mode.hdisplay, + connector.config.default_mode.vdisplay, + 0.0, 0.0, 0.0, &connector.fb[0]); + igt_assert(data->fb_id[0]); + + if (mode == TEST_CURSOR_MOVE) + create_cursor_fb(data, &connector.fb[0]); + + data->fb_id[1] = create_fb(data, + connector.config.default_mode.hdisplay, + connector.config.default_mode.vdisplay, + 0.1, 0.1, 0.1, &connector.fb[1]); + igt_assert(data->fb_id[1]); + + data->handle[0] = connector.fb[0].gem_handle; + data->handle[1] = connector.fb[1].gem_handle; + + /* scanout = fb[1] */ + connector_set_mode(data, &connector, &connector.config.default_mode, + data->fb_id[1]); + + if (mode == TEST_CONTEXT || mode == TEST_PAGE_FLIP_AND_CONTEXT) { + data->ctx[0] = drm_intel_gem_context_create(data->bufmgr); + igt_require(data->ctx[0]); + data->ctx[1] = drm_intel_gem_context_create(data->bufmgr); + igt_require(data->ctx[1]); + + /* + * Disable FBC RT address for both contexts + * (by "rendering" to a non-scanout buffer). + */ + exec_nop(data, data->handle[0], data->ctx[1]); + exec_nop(data, data->handle[0], data->ctx[0]); + exec_nop(data, data->handle[0], data->ctx[1]); + exec_nop(data, data->handle[0], data->ctx[0]); + } + + /* scanout = fb[0] */ + connector_set_mode(data, &connector, &connector.config.default_mode, + data->fb_id[0]); + + if (mode == TEST_CONTEXT || mode == TEST_PAGE_FLIP_AND_CONTEXT) { + /* + * make ctx[0] FBC RT address point to fb[0], ctx[1] + * FBC RT address is left as disabled. + */ + exec_nop(data, connector.fb[0].gem_handle, data->ctx[0]); + } + + kmstest_free_connector_config(&connector.config); + + return true; +} + +static void finish_crtc(data_t *data, enum test_mode mode) +{ + if (mode == TEST_CONTEXT || mode == TEST_PAGE_FLIP_AND_CONTEXT) { + drm_intel_gem_context_destroy(data->ctx[0]); + drm_intel_gem_context_destroy(data->ctx[1]); + } +} + +static void run_test(data_t *data, enum test_mode mode) +{ + int i; + drmModeConnectorPtr c; + + for (i = 0; i < data->resources->count_connectors; i++) { + uint32_t connector_id = data->resources->connectors[i]; + c = drmModeGetConnector(data->drm_fd, connector_id); + + if (c->connector_type != DRM_MODE_CONNECTOR_eDP || + c->connection != DRM_MODE_CONNECTED) + continue; + + data->crtc_idx = 0; + data->crtc_id = data->resources->crtcs[0]; + + if (!prepare_crtc(data, connector_id, mode)) + continue; + + test_crc(data, mode); + + finish_crtc(data, mode); + } +} + +igt_main +{ + data_t data = {}; + enum test_mode mode; + + igt_skip_on_simulation(); + + igt_fixture { + data.drm_fd = drm_open_any(); + igt_set_vt_graphics_mode(); + + data.devid = intel_get_drm_devid(data.drm_fd); + + igt_debugfs_init(&data.debugfs); + + igt_assert(psr_sink_support(&data)); + + data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096); + igt_assert(data.bufmgr); + drm_intel_bufmgr_gem_enable_reuse(data.bufmgr); + + display_init(&data); + } + + for (mode = TEST_PAGE_FLIP; mode <= TEST_CURSOR_MOVE; mode++) { + igt_subtest_f("%s", test_mode_str(mode)) { + run_test(&data, mode); + } + } + + igt_fixture { + drm_intel_bufmgr_destroy(data.bufmgr); + display_fini(&data); + } +} -- 1.8.1.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx