From: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> Hi Back in July 2013 I sent an email asking about interrupts and suggesting ways to improve our code [0]. Based on those discussions, I submitted a patch series proposing some changes [1]. I received some reviews and the general idea was accepted, but due to priority changes I couldn't update the series and resend it. After this, BDW code got merged and, with it, some BDW-specific IRQ macros that do basically what I had proposed earlier. So this series tries to reuse those BDW macros on ILK+ code. I think this series is an improvement because now, if we want to change how we treat interrupts, we just need to change the macro and everything gets automatically updated. Also, our code is now smaller :) In some of the patches I had to decide between adding POSTING_READ calls to the macros or leave them on the callers. Adding the calls to the macros means we'll call them more times than what is strictly necessary. Not doing that means we may forget some POSTING_READ calls at some point. I chose to follow the BDW example and leave the task of doing POSTING_READ outside the macros. If we don't think this is the best way, I can change it, no problem. I also considered doing the exact same changes to the previous Gens, but I don't have hardware to test them, and there's a potential to use some different macros due to PIPESTAT handling. So adding Gen2+ support is left as an exercise to developers from the future :) Thanks, Paulo [0]: proposals/questions about the IRQ registers http://lists.freedesktop.org/archives/intel-gfx/2013-July/029807.html [1]: [PATCH 00/15] Unify interrupt register init/reset http://lists.freedesktop.org/archives/intel-gfx/2013-July/030556.html *** BLURB HERE *** Paulo Zanoni (19): drm/i915: add GEN5_IRQ_INIT macro drm/i915: also use GEN5_IRQ_INIT with south display interrupts drm/i915: use GEN8_IRQ_INIT on GEN5 drm/i915: add GEN5_IRQ_FINI drm/i915: don't forget to uninstall the PM IRQs drm/i915: properly clear IIR at irq_uninstall on Gen5+ drm/i915: add GEN5_IRQ_INIT drm/i915: check if IIR is still zero at postinstall on Gen5+ drm/i915: fix SERR_INT init/reset code drm/i915: fix GEN7_ERR_INT init/reset code drm/i915: fix open coded gen5_gt_irq_preinstall drm/i915: extract ibx_irq_uninstall drm/i915: call ibx_irq_uninstall from gen8_irq_uninstall drm/i915: enable SDEIER later drm/i915: remove ibx_irq_uninstall drm/i915: add missing intel_hpd_irq_uninstall drm/i915: add ironlake_irq_reset drm/i915: add gen8_irq_reset drm/i915: only enable HWSTAM interrupts on postinstall on ILK+ drivers/gpu/drm/i915/i915_irq.c | 270 ++++++++++++++++++---------------------- 1 file changed, 124 insertions(+), 146 deletions(-) -- 1.8.4.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx