On Fri, Jan 17, 2014 at 01:58:43PM +0000, Chris Wilson wrote: > On Fri, Jan 17, 2014 at 03:46:43PM +0200, Imre Deak wrote: > > Atm after a failed link training we disable the DP port. This can happen > > during a modeset-enable or a DP link re-establishment. The latter can be > > a problem and we shouldn't disable the DP port, see the previous patch for > > the reasoning. In the former case the right thing would be to disable > > the DP port, but also the rest of the pipe. > > > > As a stop-gap solution leave the DP port enabled in both cases. It is an > > improvement on its own (avoiding HW lock ups) and the proper solution > > for the first case requires a bigger change, so let's keep that on the > > TODO list. > > > > v2: > > - fix explanation of change impact (Chris) > > > > Suggested-by: Daniel Vetter <daniel@xxxxxxxx> > > Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx> > Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > and r-b for patch 1 as well (if I didn't send it). Both merged, thanks. -Daniel > -Chris > > -- > Chris Wilson, Intel Open Source Technology Centre > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
