2014/1/16 Daniel Vetter <daniel.vetter@xxxxxxxx>:
> Our init_clock_gating functions and related code should already take
> care of this. And if they don't we'd better know.
For both registers, I see functions applying specific workarounds, but
they only do the read-write-modify through _MASKED_BIT_ENABLE(). I
don't see anybody explicitly fully initializing the registers
anywhere. So we go with whatever the BIOS gives us at boot + our
changes to a few specific registers. At resume, we don't know so far
what we'll get, so I fear this patch may in fact cause a regression.
>
> Signed-off-by: Daniel Vetter <daniel.vetter@xxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_suspend.c | 26 +++++++++++++++-----------
> 1 file changed, 15 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
> index e6c90d1382b3..0b72fcd28d4d 100644
> --- a/drivers/gpu/drm/i915/i915_suspend.c
> +++ b/drivers/gpu/drm/i915/i915_suspend.c
> @@ -348,12 +348,14 @@ int i915_save_state(struct drm_device *dev)
>
> intel_disable_gt_powersave(dev);
>
> - /* Cache mode state */
> - if (INTEL_INFO(dev)->gen < 7)
> - dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
> + if (!drm_core_check_feature(dev, DRIVER_MODESET)) {
> + /* Cache mode state */
> + if (INTEL_INFO(dev)->gen < 7)
> + dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
>
> - /* Memory Arbitration state */
> - dev_priv->regfile.saveMI_ARB_STATE = I915_READ(MI_ARB_STATE);
> + /* Memory Arbitration state */
> + dev_priv->regfile.saveMI_ARB_STATE = I915_READ(MI_ARB_STATE);
> + }
>
> /* Scratch space */
> for (i = 0; i < 16; i++) {
> @@ -394,13 +396,15 @@ int i915_restore_state(struct drm_device *dev)
> }
> }
>
> - /* Cache mode state */
> - if (INTEL_INFO(dev)->gen < 7)
> - I915_WRITE(CACHE_MODE_0, dev_priv->regfile.saveCACHE_MODE_0 |
> - 0xffff0000);
> + if (!drm_core_check_feature(dev, DRIVER_MODESET)) {
> + /* Cache mode state */
> + if (INTEL_INFO(dev)->gen < 7)
> + I915_WRITE(CACHE_MODE_0, dev_priv->regfile.saveCACHE_MODE_0 |
> + 0xffff0000);
>
> - /* Memory arbitration state */
> - I915_WRITE(MI_ARB_STATE, dev_priv->regfile.saveMI_ARB_STATE | 0xffff0000);
> + /* Memory arbitration state */
> + I915_WRITE(MI_ARB_STATE, dev_priv->regfile.saveMI_ARB_STATE | 0xffff0000);
> + }
>
> for (i = 0; i < 16; i++) {
> I915_WRITE(SWF00 + (i << 2), dev_priv->regfile.saveSWF0[i]);
> --
> 1.8.5.2
>
> _______________________________________________
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> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Paulo Zanoni
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