From: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> Because PC8 is part of runtime PM, and platforms without PC8 will need gpu_idle for runtime PM support. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_debugfs.c | 1 - drivers/gpu/drm/i915/i915_drv.h | 3 ++- drivers/gpu/drm/i915/intel_display.c | 32 ++++++++++++++++---------------- drivers/gpu/drm/i915/intel_pm.c | 8 ++++++-- 4 files changed, 24 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 0f2c356..5943f49 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -1902,7 +1902,6 @@ static int i915_pc8_status(struct seq_file *m, void *unused) } mutex_lock(&dev_priv->pc8.lock); - seq_printf(m, "GPU idle: %s\n", yesno(dev_priv->pc8.gpu_idle)); seq_printf(m, "Disable count: %d\n", dev_priv->pc8.disable_count); seq_printf(m, "IRQs disabled: %s\n", yesno(dev_priv->pc8.irqs_disabled)); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 94f0926..5decc82 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1308,7 +1308,6 @@ struct ilk_wm_values { * For more, read "Display Sequences for Package C8" on our documentation. */ struct i915_package_c8 { - bool gpu_idle; bool irqs_disabled; /* Only true after the delayed work task actually enables it. */ bool enabled; @@ -1326,6 +1325,8 @@ struct i915_package_c8 { struct i915_runtime_pm { bool suspended; + bool gpu_idle; + struct mutex gpu_idle_lock; }; enum intel_pipe_crc_source { diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index c949a16..9ead35e 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -6733,30 +6733,30 @@ void hsw_disable_package_c8(struct drm_i915_private *dev_priv) mutex_unlock(&dev_priv->pc8.lock); } -static void hsw_package_c8_gpu_idle(struct drm_i915_private *dev_priv) +static void intel_runtime_pm_gpu_idle(struct drm_i915_private *dev_priv) { - if (!HAS_PC8(dev_priv->dev)) + if (!HAS_RUNTIME_PM(dev_priv->dev)) return; - mutex_lock(&dev_priv->pc8.lock); - if (!dev_priv->pc8.gpu_idle) { - dev_priv->pc8.gpu_idle = true; - __hsw_enable_package_c8(dev_priv); + mutex_lock(&dev_priv->pm.gpu_idle_lock); + if (!dev_priv->pm.gpu_idle) { + dev_priv->pm.gpu_idle = true; + intel_runtime_pm_put(dev_priv); } - mutex_unlock(&dev_priv->pc8.lock); + mutex_unlock(&dev_priv->pm.gpu_idle_lock); } -static void hsw_package_c8_gpu_busy(struct drm_i915_private *dev_priv) +static void intel_runtime_pm_gpu_busy(struct drm_i915_private *dev_priv) { - if (!HAS_PC8(dev_priv->dev)) + if (!HAS_RUNTIME_PM(dev_priv->dev)) return; - mutex_lock(&dev_priv->pc8.lock); - if (dev_priv->pc8.gpu_idle) { - dev_priv->pc8.gpu_idle = false; - __hsw_disable_package_c8(dev_priv); + mutex_lock(&dev_priv->pm.gpu_idle_lock); + if (dev_priv->pm.gpu_idle) { + dev_priv->pm.gpu_idle = false; + intel_runtime_pm_get(dev_priv); } - mutex_unlock(&dev_priv->pc8.lock); + mutex_unlock(&dev_priv->pm.gpu_idle_lock); } #define for_each_power_domain(domain, mask) \ @@ -8085,7 +8085,7 @@ void intel_mark_busy(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; - hsw_package_c8_gpu_busy(dev_priv); + intel_runtime_pm_gpu_busy(dev_priv); i915_update_gfx_val(dev_priv); } @@ -8094,7 +8094,7 @@ void intel_mark_idle(struct drm_device *dev) struct drm_i915_private *dev_priv = dev->dev_private; struct drm_crtc *crtc; - hsw_package_c8_gpu_idle(dev_priv); + intel_runtime_pm_gpu_idle(dev_priv); if (!i915_powersave) return; diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index bf2b963..7027a35 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5526,6 +5526,8 @@ void intel_init_runtime_pm(struct drm_i915_private *dev_priv) pm_runtime_set_autosuspend_delay(device, 10000); /* 10s */ pm_runtime_mark_last_busy(device); pm_runtime_use_autosuspend(device); + + pm_runtime_put_autosuspend(device); } void intel_fini_runtime_pm(struct drm_i915_private *dev_priv) @@ -5784,10 +5786,12 @@ void intel_pm_setup(struct drm_device *dev) mutex_init(&dev_priv->rps.hw_lock); mutex_init(&dev_priv->pc8.lock); - dev_priv->pc8.gpu_idle = false; dev_priv->pc8.irqs_disabled = false; dev_priv->pc8.enabled = false; - dev_priv->pc8.disable_count = 1; /* gpu_idle */ + dev_priv->pc8.disable_count = 0; INIT_DELAYED_WORK(&dev_priv->rps.delayed_resume_work, intel_gen6_powersave_work); + + dev_priv->pm.gpu_idle = true; + mutex_init(&dev_priv->pm.gpu_idle_lock); } -- 1.8.3.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx