On Fri, Dec 06, 2013 at 02:11:28PM -0800, Ben Widawsky wrote:
> The pin IOCTL is leftover from the days of yore. It allows you to take a
> buffer, pin it, and receive the offset of that buffer. The IOCTL does
> not support the newer notion of contexts and VM, and therefore is not
> suitable for modern usage.
>
> The unsolvable problem is, "which address space do I pin this in?"
>
> As there are still mechanisms to do things only with the GGTT, and this
> could potentially have benefit as workarounds, leave it in place, but
> provide a warning to users.
>
> Request-to-not-deprecate-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> Signed-off-by: Ben Widawsky <ben@xxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_gem.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index f7114ae..a03c262 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3950,6 +3950,8 @@ i915_gem_pin_ioctl(struct drm_device *dev, void *data,
> goto out;
> }
>
> + if (USES_FULL_PPGTT(dev))
> + DRM_DEBUG_DRIVER("Pinning with full PPGTT is not recommended\n");
I disagree. If we need this for a w/a we need a real w/a, not some
root-only hack. I'll add a patch to reject pin on pre-gen6.
-Daniel
> obj->user_pin_count++;
> obj->pin_filp = file;
>
> --
> 1.8.4.2
>
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
