On Mon, Dec 02, 2013 at 11:37:30AM -0200, Rodrigo Vivi wrote:
> On Thu, Nov 21, 2013 at 1:47 PM, Paulo Zanoni <przanoni@xxxxxxxxx> wrote:
> > From: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>
> >
> > The code to enable/disable PC8 already takes care of saving and
> > restoring all the registers we need to save/restore, so do a put()
> > call when we enable PC8 and a get() call when we disable it.
> >
> > Ideally, in order to make it easier to add runtime PM support to other
> > platforms, we should move some things from the PC8 code to the runtime
> > PM code, but let's do this later, since we can make Haswell work right
> > now.
> >
> > V2: - Rebase
> >
> > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/i915_drv.h | 2 +-
> > drivers/gpu/drm/i915/intel_display.c | 4 ++++
> > 2 files changed, 5 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 3702746..002b99d 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -1836,7 +1836,7 @@ struct drm_i915_file_private {
> > #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg)
> > #define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev))
> > #define HAS_PC8(dev) (IS_HASWELL(dev)) /* XXX HSW:ULX */
> > -#define HAS_RUNTIME_PM(dev) false
> > +#define HAS_RUNTIME_PM(dev) (IS_HASWELL(dev))
> >
> > #define INTEL_PCH_DEVICE_ID_MASK 0xff00
> > #define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 95e8831..820013a 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -6641,6 +6641,8 @@ void hsw_enable_pc8_work(struct work_struct *__work)
> > lpt_disable_clkout_dp(dev);
> > hsw_pc8_disable_interrupts(dev);
> > hsw_disable_lcpll(dev_priv, true, true);
> > +
> > + intel_runtime_pm_put(dev_priv);
>
> Maybe this could be along with other put and get on previous patches
> and let this patch just to really enable the runtime pm.
> But anyway, feel free to use:
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
Ok, I've merged all the patches with r-bs, minus the one change for the
hangcheck which I've taken out of the relevant patch. And I didn't enable
D3 in this patch since it's not yet complete.
For resending patche I think it's better to start a new thread, I've had a
hard time finding the right patches (so please also check that I've picked
the right ones).
Thanks, Daniel
>
> > }
> >
> > static void __hsw_enable_package_c8(struct drm_i915_private *dev_priv)
> > @@ -6678,6 +6680,8 @@ static void __hsw_disable_package_c8(struct drm_i915_private *dev_priv)
> >
> > DRM_DEBUG_KMS("Disabling package C8+\n");
> >
> > + intel_runtime_pm_get(dev_priv);
> > +
> > hsw_restore_lcpll(dev_priv);
> > hsw_pc8_restore_interrupts(dev);
> > lpt_init_pch_refclk(dev);
> > --
> > 1.8.3.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
>
> --
> Rodrigo Vivi
> Blog: http://blog.vivi.eng.br
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
