On Tue, Dec 10, 2013 at 10:52:54AM -0800, Jesse Barnes wrote:
> On Tue, 10 Dec 2013 14:06:45 +0200
> ville.syrjala@xxxxxxxxxxxxxxx wrote:
>
> > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> >
> > The CRI clock is related to the display PHY, so the setup belongs
> > in intel_init_dpio().
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 11 ++++-------
> > 1 file changed, 4 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index af3717a..e3ca21f 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -1367,6 +1367,10 @@ static void intel_init_dpio(struct drm_device *dev)
> > if (!IS_VALLEYVIEW(dev))
> > return;
> >
> > + /* Enable the CRI clock source so we can get at the display */
> > + I915_WRITE(DPLL(PIPE_B), I915_READ(DPLL(PIPE_B)) |
> > + DPLL_INTEGRATED_CRI_CLK_VLV);
> > +
> > DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO;
> > /*
> > * From VLV2A0_DP_eDP_DPIO_driver_vbios_notes_10.docx -
> > @@ -10788,17 +10792,10 @@ static void i915_disable_vga(struct drm_device *dev)
> >
> > void intel_modeset_init_hw(struct drm_device *dev)
> > {
> > - struct drm_i915_private *dev_priv = dev->dev_private;
> > -
> > intel_prepare_ddi(dev);
> >
> > intel_init_clock_gating(dev);
> >
> > - /* Enable the CRI clock source so we can get at the display */
> > - if (IS_VALLEYVIEW(dev))
> > - I915_WRITE(DPLL(PIPE_B), I915_READ(DPLL(PIPE_B)) |
> > - DPLL_INTEGRATED_CRI_CLK_VLV);
> > -
> > intel_init_dpio(dev);
> >
> > mutex_lock(&dev->struct_mutex);
>
> Reviewed-by: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx>
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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