On Sun, Dec 08, 2013 at 01:52:35PM +0530, deepak.s@xxxxxxxxx wrote:
> From: Deepak S <deepak.s@xxxxxxxxx>
>
> On VLV the PCBR register has other bits besides the pcbr address
> field. Verify only address field setup by BIOS to make sure we don't
> misinterpret the PCBR setup.
>
> Signed-off-by: Deepak S <deepak.s@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index e6d98fe..2e1340f 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4036,7 +4036,12 @@ static void valleyview_setup_pctx(struct drm_device *dev)
> int pctx_size = 24*1024;
>
> pcbr = I915_READ(VLV_PCBR);
> - if (pcbr) {
> +
> + /* PCBR Format: Bits 31:12 - Base address of Process Context
> + * Bits 11:1 - Reserved
> + * Bit 0 - PCBR Lock
> + * Check only address field if already setup by BIOS */
> + if (pcbr >> 12) {
I'd just add a VLV_PCBR_ADDR_MASK #define and & it. That's a bit more the
idiom we usually use, and also allows us to ditcht the comment. You could
even add a VLV_PCBR_LOCK #define if you want.
-Daniel
> /* BIOS set it up already, grab the pre-alloc'd space */
> int pcbr_offset;
>
> --
> 1.8.4.2
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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