From: "Xiang, Haihao" <haihao.xiang@xxxxxxxxx> write(...) is used for Render Target Write and Media Block Write. The two message types no longer share the same cache agent on GEN8, So a parameter is needed for cache agent. The 4th parameter of write() is used for write commit bit which has been removed since GEN7. Hence we can re-use the 4th parameter as cache agent on GEN8 Signed-off-by: Xiang, Haihao <haihao.xiang@xxxxxxxxx> --- assembler/gram.y | 30 ++++++++++++++++++++++++++++-- 1 file changed, 28 insertions(+), 2 deletions(-) diff --git a/assembler/gram.y b/assembler/gram.y index bdcfe79..ad4cb29 100644 --- a/assembler/gram.y +++ b/assembler/gram.y @@ -1651,7 +1651,20 @@ msgtarget: NULL_TOKEN INTEGER RPAREN { if (IS_GENp(8)) { - gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_RENDER_CACHE); + if ($9 != 0 && + $9 != GEN6_SFID_DATAPORT_SAMPLER_CACHE && + $9 != GEN6_SFID_DATAPORT_RENDER_CACHE && + $9 != GEN6_SFID_DATAPORT_CONSTANT_CACHE && + $9 != GEN7_SFID_DATAPORT_DATA_CACHE && + $9 != HSW_SFID_DATAPORT_DATA_CACHE1) { + error (&@9, "error: wrong cache type\n"); + } + + if ($9 == 0) + gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_RENDER_CACHE); + else + gen8_set_sfid(GEN8(&$$), $9); + gen8_set_header_present(GEN8(&$$), 1); gen8_set_dp_binding_table_index(GEN8(&$$), $3); gen8_set_dp_message_control(GEN8(&$$), $5); @@ -1701,7 +1714,20 @@ msgtarget: NULL_TOKEN INTEGER COMMA INTEGER RPAREN { if (IS_GENp(8)) { - gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_RENDER_CACHE); + if ($9 != 0 && + $9 != GEN6_SFID_DATAPORT_SAMPLER_CACHE && + $9 != GEN6_SFID_DATAPORT_RENDER_CACHE && + $9 != GEN6_SFID_DATAPORT_CONSTANT_CACHE && + $9 != GEN7_SFID_DATAPORT_DATA_CACHE && + $9 != HSW_SFID_DATAPORT_DATA_CACHE1) { + error (&@9, "error: wrong cache type\n"); + } + + if ($9 == 0) + gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_RENDER_CACHE); + else + gen8_set_sfid(GEN8(&$$), $9); + gen8_set_header_present(GEN8(&$$), ($11 != 0)); gen8_set_dp_binding_table_index(GEN8(&$$), $3); gen8_set_dp_message_control(GEN8(&$$), $5); -- 1.7.9.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx