On Thu, Dec 05, 2013 at 02:27:14PM +0000, Chris Wilson wrote: > On Thu, Dec 05, 2013 at 03:51:37PM +0200, ville.syrjala@xxxxxxxxxxxxxxx wrote: > > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > > ILK doesn't like if we just write the LP1+ watermarks registers with 0. > > We need to just disable the watermarks by clearing the enable bit. Use > > that method also when disabling LP1+ watermarks in init_clock_gating. > > Mind clarifying what error is reported under the current method? I > presume this patch removes another cause of underruns. Yeah you may get an underrun and a nice glitch on the screen to go with it. -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
