On Thu, 2013-11-28 at 23:57 -0700, Xiang, Haihao wrote:
> From: "Xiang, Haihao" <haihao.xiang@xxxxxxxxx>
>
> The code is for reference only
>
> Signed-off-by: Xiang, Haihao <haihao.xiang@xxxxxxxxx>
> ---
> shaders/media/README | 6 ++++++
> shaders/media/media_fill.gxa | 30 ++++++++++++++++++++++++++++++
> 2 files changed, 36 insertions(+)
> create mode 100644 shaders/media/README
> create mode 100644 shaders/media/media_fill.gxa
>
> diff --git a/shaders/media/README b/shaders/media/README
> new file mode 100644
> index 0000000..334106c
> --- /dev/null
> +++ b/shaders/media/README
> @@ -0,0 +1,6 @@
> +These files are here for reference only.
> +
> +Commands used to generate the shader on gen8
> +$> m4 media_fill.gxa > media_fill.gxm
> +$> intel-gen4asm -g 8 -o <output> media_fill.gxm
> +
> diff --git a/shaders/media/media_fill.gxa b/shaders/media/media_fill.gxa
> new file mode 100644
> index 0000000..d2931d4
> --- /dev/null
> +++ b/shaders/media/media_fill.gxa
> @@ -0,0 +1,30 @@
> +/*
> + * Registers
> + * g0 -- header
> + * g1 -- constant
> + * g2 -- inline data
> + * g3 -- reserved
> + * g4-g12 message payload
> + */
> +define(`ORIG', `g2.0<2,2,1>UD')
> +define(`COLOR', `g1.0')
> +define(`COLORUB', `COLOR<0,1,0>UB')
> +define(`COLORUD', `COLOR<0,1,0>UD')
> +
> +mov(4) COLOR<1>UB COLORUB {align1};
> +
> +/* WRITE */
> +mov(8) g4.0<1>UD g0.0<8,8,1>UD {align1};
> +mov(2) g4.0<1>UD ORIG {align1};
> +mov(1) g4.8<1>UD 0x000f000fUD {align1};
> +
> +mov(16) g5.0<1>UD COLORUD {align1 compr};
> +mov(16) g7.0<1>UD COLORUD {align1 compr};
> +mov(16) g9.0<1>UD COLORUD {align1 compr};
> +mov(16) g11.0<1>UD COLORUD {align1 compr};
> +
> +send(16) 4 acc0<1>UW null write(0, 0, 10, 0) mlen 9 rlen 0 {align1};
> +
> +/* EOT */
> +mov(8) g4.0<1>UD g0.0<8,8,1>UD {align1};
> +send(16) 4 acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT};
Based on the spec the send with EOT flag should use the register space
r112-r127 for <src>. So 4 had better be changed as 127.
Thanks.
Yakui
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