On Fri, Nov 01, 2013 at 10:25:42AM -0700, Jesse Barnes wrote: > On Fri, 1 Nov 2013 18:22:41 +0200 > ville.syrjala@xxxxxxxxxxxxxxx wrote: > > > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > > Reduce the eDP detection to just checking if it's port A, or if > > the VBT tells us that the port is eDP for the other ports. > > > > Suggested-by: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > --- > > drivers/gpu/drm/i915/intel_dp.c | 26 ++++++-------------------- > > 1 file changed, 6 insertions(+), 20 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > > index 87cfb12..1e6bf7b 100644 > > --- a/drivers/gpu/drm/i915/intel_dp.c > > +++ b/drivers/gpu/drm/i915/intel_dp.c > > @@ -3274,6 +3274,9 @@ bool intel_dp_is_edp(struct drm_device *dev, enum port port) > > [PORT_D] = PORT_IDPD, > > }; > > > > + if (port == PORT_A) > > + return true; > > + > > if (!dev_priv->vbt.child_dev_num) > > return false; > > > > @@ -3560,27 +3563,10 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, > > intel_dp->DP = I915_READ(intel_dp->output_reg); > > intel_dp->attached_connector = intel_connector; > > > > - type = DRM_MODE_CONNECTOR_DisplayPort; > > - /* > > - * FIXME : We need to initialize built-in panels before external panels. > > - * For X0, DP_C is fixed as eDP. Revisit this as part of VLV eDP cleanup > > - */ > > - switch (port) { > > - case PORT_A: > > + if (intel_dp_is_edp(dev, port)) > > type = DRM_MODE_CONNECTOR_eDP; > > - break; > > - case PORT_B: > > - case PORT_C: > > - if (IS_VALLEYVIEW(dev) && intel_dp_is_edp(dev, port)) > > - type = DRM_MODE_CONNECTOR_eDP; > > - break; > > - case PORT_D: > > - if (HAS_PCH_SPLIT(dev) && intel_dp_is_edp(dev, port)) > > - type = DRM_MODE_CONNECTOR_eDP; > > - break; > > - default: /* silence GCC warning */ > > - break; > > - } > > + else > > + type = DRM_MODE_CONNECTOR_DisplayPort; > > > > /* > > * For eDP we always set the encoder type to INTEL_OUTPUT_EDP, but > > Ah much better. > > Reviewed-by: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> Ok, now also merged patches 1&3 of the original series here. Patch 1 didn't really apply that well any more, so please double-check what I've done. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx