On Thu, Nov 28, 2013 at 09:20:40AM +0530, deepak.s@xxxxxxxxx wrote: > From: Deepak S <deepak.s@xxxxxxxxx> > > Valleyview has power wells MEDIA & RENDER and by spliting vlv force wake > routines and individually controling Media/Render well, We have seen > power savings in the lower sub-1W range on different workloads, e.g. > glbenchmark, media playback > > v2: Addressed review comments. I've alredy pulled it all in and fixed things up while applying ;-) And iirc this is v3 of this series if we count the not-split patch as v1. Please double-check that I didn't miss anything in latest -nightly. -Daniel > > Deepak S (3): > drm/i915: Add power well arguments to force wake routines. > drm/i915/vlv: Valleyview support for forcewake Individual power wells. > v2 > drm/i915: Enabling DebugFS for valleyview forcewake counts. v2 > > drivers/gpu/drm/i915/i915_debugfs.c | 22 ++-- > drivers/gpu/drm/i915/i915_drv.h | 32 ++++- > drivers/gpu/drm/i915/i915_reg.h | 4 +- > drivers/gpu/drm/i915/intel_display.c | 4 +- > drivers/gpu/drm/i915/intel_pm.c | 22 ++-- > drivers/gpu/drm/i915/intel_ringbuffer.c | 14 ++- > drivers/gpu/drm/i915/intel_uncore.c | 217 +++++++++++++++++++++++++------- > 7 files changed, 246 insertions(+), 69 deletions(-) > > -- > 1.8.4.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
